LDPC Decoder Node Locking for Lower-Power Message Passing

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Solution Overview

Problem

Conventional low density parity check (LDPC) decoding systems are power hungry, consuming excessive energy due to inefficient message passing and processing during the decoding process.

Innovation Solution

Implementing a low-power LDPC decoding method that dynamically locks variable and check nodes based on probability thresholds and iteration counts, reducing unnecessary message calculations and memory access, thereby conserving energy by minimizing wasted calculations and memory operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If conventional LDPC decoding is performed with all nodes processing messages in every iteration, then decoding accuracy is maintained, but power consumption increases excessively

Engineering Contradiction:
Improvepower consumptionVSAvoiddecoding efficiency
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The patent implements dynamic node locking where variable nodes and check nodes are selectively locked or unlocked based on their convergence status. Nodes that have converged (met probability thresholds) are locked to stop processing, while non-converged nodes remain active. This dynamic adaptation allows the system to reduce power consumption by eliminating unnecessary message passing from converged nodes while maintaining decoding accuracy for non-converged nodes.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent applies different processing states to different nodes based on their individual convergence characteristics. Each variable node and check node is independently evaluated against probability thresholds, and locking decisions are made locally for each node rather than uniformly across the entire decoder. This local quality approach ensures that only the necessary nodes continue processing, optimizing the balance between power consumption and decoding performance.

Inventive Principle:
Principle #3Local quality

2Loss of energy

If message passing continues for all nodes throughout all iterations, then complete decoding is achieved, but unnecessary calculations waste energy

Engineering Contradiction:
Improvewasted energyVSAvoiddecoding completeness
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent employs feedback mechanisms where the decoder continuously monitors message passing outcomes and node convergence status. Probability thresholds are evaluated after each iteration, and based on this feedback, nodes are locked or unlocked accordingly. This feedback-driven approach ensures that message passing stops for nodes that have achieved sufficient convergence, preventing wasted energy while maintaining the reliability of the overall decoding process through continued processing of non-converged nodes.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent implements partial action by selectively applying message passing only to non-converged nodes in each iteration rather than all nodes. The locking mechanism allows the system to perform exactly the necessary computations for nodes that haven't met convergence criteria, avoiding excessive calculations for already-converged nodes. This partial action approach reduces energy waste while ensuring decoding completeness through continued processing where needed.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS9838035B2Low-power low density parity check decoding
Publication Date: 2017.12.05 MAXLINEAR INC
  • US9838035B2 patent drawing
  • US9838035B2 patent drawing
  • US9838035B2 patent drawing

AI summary

In an example implementation of this disclosure, a message passing low density parity check (LDPC) decoder may, during decoding of a first group of bits, lock a first variable node upon a bit-value probability of the first variable node reaching a determined threshold, and lock a first check node upon all variable nodes connected to the first check node being locked. The LDPC decoder may cease decoding the first group of bits upon all variable nodes of the LDPC decoder being locked, all check nodes of the LDPC decoder being locked, reaching a maximum number of iterations, or reaching a timeout. During a particular iteration of the decoding of the first group of bits in which the first variable node is locked, the LDPC decoder may refrain from generating a bit-value probability for the locked first variable node.