LDPC Zero-Padding Pattern for Fixed-Length Signaling Encoding

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Solution Overview

Problem

Current channel encoding and modulation techniques for signaling information in broadcast systems lack robustness and efficiency, necessitating the development of new methods optimized for signaling information transmission.

Innovation Solution

A zero padding technique is introduced, where a processor generates an LDPC information bit string by filling specific groups with zeros based on a shortening pattern order, and the BCH-encoded bit string is used to fill remaining groups, optimizing the LDPC codeword for transmission. This involves a processor and memory system that decides which groups to fill with zeros and uses the BCH-encoded bit string to generate the LDPC information bit string, suitable for LDPC encoders with a code rate of 3/15 and length of 16200.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional channel encoding and modulation techniques are used for signaling information transmission, then the transmission can be performed with standard methods, but the robustness and efficiency of the transmission are insufficient

Engineering Contradiction:
Improverobustness of signaling information transmissionVSAvoidefficiency of signaling information transmission
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies parameter changes by modifying the LDPC code rate and block length parameters to be specifically optimized for signaling information transmission. The encoder uses a code rate of 3/15 and block length of 16200 bits, which are tailored parameters that improve both reliability and efficiency compared to conventional parameters used for data transmission.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The signaling information is segmented into fixed-length blocks that are then processed through the LDPC encoder. This segmentation allows the encoding scheme to be optimized for specific block sizes, improving the overall transmission efficiency while maintaining robustness through the structured encoding process.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If the LDPC information bit string length is adjusted to match the BCH-encoded bit string length, then the encoding process becomes simpler, but the robustness of signaling information transmission deteriorates

Engineering Contradiction:
Improvecomplexity of encoding processVSAvoidrobustness of signaling information transmission
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent applies preliminary action by pre-calculating the difference between the LDPC information bit string length and the BCH-encoded bit string length before encoding. This difference value is used to determine the number of zero bits to be padded, allowing the system to maintain optimized code parameters while managing the complexity of the encoding process through advance preparation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces zero-padding as an intermediary mechanism between the BCH encoding stage and the LDPC encoding stage. By inserting a calculated number of zero bits, the system bridges the length mismatch between different encoding stages while maintaining the robustness of the overall transmission scheme.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If zero padding is applied to the LDPC information bit string, then the robustness of transmission is improved, but the transmission efficiency decreases due to increased bit length

Engineering Contradiction:
Improverobustness of signaling information transmissionVSAvoidefficiency of signaling information transmission
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies partial action by using zero-padding only to the extent necessary to achieve the optimal code rate and block length for signaling information. The number of zero bits is precisely calculated based on the difference between LDPC and BCH bit string lengths, avoiding excessive padding that would unnecessarily reduce transmission efficiency while still achieving the desired robustness.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11736123B2Zero padding apparatus for encoding fixed-length signaling information and zero padding method using same
Publication Date: 2023.08.22 ELECTRONICS & TELECOMM RES INST
  • US11736123B2 patent drawing
  • US11736123B2 patent drawing
  • US11736123B2 patent drawing

AI summary

A zero padding apparatus and method for fixed length signaling information are disclosed. A zero padding apparatus according to an embodiment of the present invention includes a processor configured to generate a LDPC information bit string by deciding a number of groups whose all bits are to be filled with 0 using a difference between a length of the LDPC information bit string and a length of a BCH-encoded bit string, selecting the groups using a shortening pattern order to fill all the bits of the groups with 0, and filling at least a part of remaining groups, which are not filled with 0, with the BCH-encoded bit string; and memory configured to provide the LDPC information bit string to an LDPC encoder.