16200-Length LDPC Encoder Using Sequence-Based Parity Accumulation
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Solution Overview
Problem
Current terrestrial TV broadcasting systems face co-channel interference issues, leading to white spaces and reduced spectrum efficiency, particularly in areas where frequency reuse is limited to three times the service radius, necessitating a transmission technology that eliminates white spaces and ensures robust reception.
Innovation Solution
A new Low Density Parity Check (LDPC) code with a length of 16200 and a code rate of 4/15 is developed, utilizing an LDPC encoding technique that efficiently performs encoding using a sequence derived from the sum of the systematic and parity parts of the codeword, divided by the circulant permutation matrix size, to facilitate robust LDPC encoding and decoding in wireless channels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If terrestrial TV broadcasting uses conventional frequency reuse with three times service radius, then co-channel interference is avoided, but white spaces are created and spectrum efficiency deteriorates
Solution Approach 1:
The patent applies parameter changes by modifying the LDPC code parameters (code length to 16200 and code rate to 4/15) to achieve better error correction performance. This enables the system to maintain reliable reception in co-channel interference environments, allowing frequency reuse within one service radius and eliminating white spaces without sacrificing reception robustness
2Adaptability or versatility
If LDPC code length is changed to match DVB broadcast standard (16200), then general applicability is improved, but encoding complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the 16200-length codeword into a systematic part (4320 bits) and a parity part (11880 bits). The encoder uses multiple memory units to store and process these segments separately, with the processor performing accumulation operations on the parity bits based on the systematic bits. This segmented approach enables efficient encoding of the longer code length while maintaining manageable complexity through modular processing
3Productivity
If LDPC encoding uses accumulated value in memory with sequence-based parity check matrix, then encoding efficiency is improved, but memory requirements increase
Solution Approach 1:
The patent segments the encoding process into systematic bit processing and parity bit generation. Memory 310 stores the systematic part (4320 bits) and memory 320 stores the parity part (11880 bits). The processor reads systematic bits from memory 310, performs accumulation operations according to the sequence-based PCM, and writes results to memory 320. This segmentation enables efficient encoding by processing different parts in separate memory units
Solution Approach 2:
The patent introduces an intermediary sequence-based parity check matrix that mediates between the systematic bits and parity bit generation. The processor uses this sequence as an intermediary to determine which parity bits should be accumulated with which systematic bits, enabling efficient encoding without requiring the entire PCM to be stored in memory simultaneously
Data Source
AI summary
A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 16200 and a code rate of 4/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).