LDPC Parity Encoding Using Common Partial Parity Products
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The calculation of parity bits in low-density parity-check (LDPC) codes requires additional hardware, processing time, and memory, leading to increased delay in message transmission, and there is a need for a more efficient method to simplify this process.
Innovation Solution
A method that identifies and optimally reuses common mathematical operations in parity bit calculations, storing these operations in lookup tables to reduce hardware requirements and power consumption, specifically for 10-GBase-T LDPC encoders, by separating common and unique operations and performing them accordingly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional LDPC parity bit calculation methods are used, then error correction capability is achieved, but hardware complexity and processing time increase
Solution Approach 1:
The patent segments the parity bit calculation process into distinct functional blocks (e.g., systematic parity generation, overhead parity generation, interleaving stages) that can be independently implemented and optimized. This segmentation allows complex LDPC encoding to be broken down into manageable hardware modules, reducing overall system complexity while maintaining error correction capability.
Solution Approach 2:
The patent performs preliminary calculations and preparations before the main encoding process, such as pre-defining the parity-check matrix structure, pre-calculating systematic parity bits from information bits, and pre-organizing data in systematic form. This preliminary action reduces the computational burden during real-time encoding, decreasing hardware requirements and processing time.
2Reliability
If traditional LDPC parity bit calculation methods are used, then error correction capability is achieved, but processing time and transmission delay increase
Solution Approach 1:
By dividing the encoding process into parallel segments (systematic parity generation, overhead parity generation, interleaving), the patent enables simultaneous execution of multiple calculation stages, significantly reducing total processing time while maintaining the complete error correction functionality of LDPC codes.
Solution Approach 2:
The patent performs preliminary parity bit calculations and data organization before the main transmission phase, preparing encoded data in advance. This preliminary encoding reduces the critical path delay during actual transmission, lowering processing time while preserving error correction capability.
3Device complexity
If lookup tables are used to store common mathematical operations, then hardware is reduced and power consumption decreases, but memory requirements increase
Solution Approach 1:
The patent merges common mathematical operations (XOR operations for parity calculation) into shared lookup tables that serve multiple calculation stages. By combining redundant computational functions into unified memory structures, the patent reduces overall hardware complexity and power consumption while the memory overhead is justified by the elimination of duplicate computational logic.
Data Source
AI summary
A system and method are provided for creating codewords using common partial parity products. The method initially accepts an algorithm for creating p indexed parity bit positions, where the parity bit for each position is calculated from mathematical operations performed on bits from n indexed user word positions. A first group of parity bit positions is found, where the parity bit for each position in the first group is calculated using at least a first number of common mathematical operations. A second group of parity bit positions is found, where the parity bit for each position in the second group is calculated using at least a second number of common mathematical operations. The common mathematical operations are subtracted from the first and second group of parity bit position calculations, so that unique mathematical operations can be found, associated with each parity bit position calculation in the first and second group.