LDPC Parity Interleaving for Variable-Length Signaling Puncturing

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Solution Overview

Problem

Current channel encoding and modulation techniques for signaling information in broadcast systems lack robustness and efficiency, particularly in next-generation digital broadcasting systems.

Innovation Solution

A parity interleaving apparatus and method that segments and group-wise interleaves parity bits of an LDPC codeword, optimizing parity puncturing based on a specific order and modulation parameters to enhance transmission efficiency for signaling information.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional channel encoding and modulation techniques are used for signaling information transmission, then the system can maintain basic functionality, but the robustness and transmission efficiency are insufficient

Engineering Contradiction:
Improverobustness of signaling information transmissionVSAvoidtransmission efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The parity bits are segmented into multiple groups (first group, second group, third group) which are then independently interleaved and punctured. This segmentation allows different parts of the parity information to be transmitted with different levels of redundancy, improving both robustness and efficiency by adapting to the specific requirements of signaling information transmission.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different groups of parity bits are assigned different qualities through selective puncturing. The first group of parity bits is fully transmitted (highest quality), the second group is partially punctured (medium quality), and the third group is heavily punctured (lowest quality). This local quality differentiation optimizes the balance between robustness and transmission efficiency for signaling information.

Inventive Principle:
Principle #3Local quality

2Reliability

If more parity bits are transmitted to improve robustness, then transmission reliability increases, but the transmission efficiency and bandwidth utilization decrease

Engineering Contradiction:
Improveerror correction capabilityVSAvoidbandwidth utilization
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

Instead of transmitting all parity bits or none, the invention applies partial action by selectively puncturing different groups of parity bits. The first group is transmitted completely, the second group is partially punctured, and the third group is heavily punctured. This partial action approach provides sufficient error correction capability while optimizing bandwidth utilization for signaling information.

Inventive Principle:
Principle #16Partial or excessive action

3Device complexity

If the parity bits are transmitted without group-wise interleaving, then the encoding process is simpler, but the performance for signaling information transmission is inferior

Engineering Contradiction:
Improveencoding process complexityVSAvoidtransmission performance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The parity bits are divided into multiple groups and each group is independently interleaved using different patterns. This segmentation-based interleaving provides better error distribution and transmission performance for signaling information while keeping the complexity manageable through systematic group processing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The group-wise interleaving is performed as a preliminary action before the actual transmission and puncturing processes. By pre-organizing the parity bits into groups with specific interleaving patterns, the system prepares the data structure to optimize both performance and the subsequent puncturing operation.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11689222B2Parity interleaving apparatus for encoding variable-length signaling information and parity interleaving method using same
Publication Date: 2023.06.27 ELECTRONICS & TELECOMM RES INST
  • US11689222B2 patent drawing
  • US11689222B2 patent drawing
  • US11689222B2 patent drawing

AI summary

A parity interleaving apparatus and method for variable length signaling information are disclosed. A parity interleaving apparatus according to an embodiment of the present invention includes a processor configured to generate a parity bit string for parity puncturing by segmenting parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, into a plurality of groups, and group-wise interleaving the groups using an order of group-wise interleaving; and memory configured to provide the parity bit string for parity puncturing to a parity puncturing unit.