LDPC Parity Interleaving for Variable-Length Signaling Robustness

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current channel encoding and modulation techniques for signaling information in broadcast systems lack robustness and efficiency, necessitating the development of new methods optimized for signaling information transmission.

Innovation Solution

A parity interleaving apparatus and method that segment and group-wise interleave parity bits of an LDPC codeword, optimizing puncturing and interleaving based on specific sequences and code rates to enhance transmission efficiency for signaling information.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional channel encoding and modulation techniques are used for signaling information transmission, then the system maintains simplicity and compatibility with existing standards, but the transmission robustness and efficiency are insufficient

Engineering Contradiction:
Improvetransmission robustnessVSAvoidencoding complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The parity bits of the LDPC codeword are segmented into multiple groups, and each group is independently interleaved using different interleaving orders. This segmentation allows the system to enhance transmission robustness through diversified interleaving patterns while maintaining manageable complexity by processing each group separately rather than treating the entire parity bit sequence as a single unit.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If the amount of signaling information varies, then the system achieves flexibility in information transmission, but the optimization of shortening and puncturing becomes more difficult

Engineering Contradiction:
Improveinformation amount adaptabilityVSAvoidshortening and puncturing optimization
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The interleaving order is dynamically adjusted based on the amount of signaling information to be transmitted. When the information amount varies, the system selects appropriate interleaving orders from a set of predefined sequences, enabling adaptive optimization of shortening and puncturing operations without requiring complex real-time calculations, thus maintaining flexibility while controlling complexity.

Inventive Principle:
Principle #15Dynamics

3Productivity

If group-wise interleaving with specific sequences is applied to parity bits, then the transmission efficiency for signaling information is enhanced, but the processing complexity increases

Engineering Contradiction:
Improvetransmission efficiencyVSAvoidinterleaving processing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

Multiple interleaving order sequences are pre-defined and stored in the system before actual transmission occurs. During operation, the appropriate pre-defined sequence is selected based on the transmission conditions and information amount, avoiding the need for complex real-time sequence generation. This preliminary preparation enhances transmission efficiency while keeping processing complexity manageable during actual operation.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12047095B2Parity interleaving apparatus for encoding variable-length signaling information and parity interleaving method using same
Publication Date: 2024.07.23 ELECTRONICS & TELECOMM RES INST
  • US12047095B2 patent drawing
  • US12047095B2 patent drawing
  • US12047095B2 patent drawing

AI summary

A parity interleaving apparatus and method for variable length signaling information are disclosed. A parity interleaving apparatus according to an embodiment of the present invention includes a processor configured to generate a parity bit string for parity puncturing by segmenting parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, into a plurality of groups, and group-wise interleaving the groups using an order of group-wise interleaving; and memory configured to provide the parity bit string for parity puncturing to a parity puncturing unit.