Variable-Rate LDPC Encoding Using Parity Matrix Puncturing
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Solution Overview
Problem
Current Low Density Parity Check (LDPC) codes in mobile communication systems are limited by their fixed coding rate, which restricts their ability to support variable coding rates necessary for high-speed, high-capacity data transmission, especially with the development of schemes like Hybrid Automatic Retransmission Request (HARQ) and Adaptive Modulation and Coding (AMC).
Innovation Solution
A method and apparatus for encoding and decoding block LDPC codes with a variable coding rate, utilizing schemes such as shortening, removing, and puncturing to adjust the parity check matrix, allowing for the support of multiple coding rates using a single encoder and decoder.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a fixed coding rate LDPC code is used, then the encoding and decoding structure is simple, but the adaptability to different transmission conditions is poor
Solution Approach 1:
The patent applies dynamics by making the coding rate configurable through selection of different information bit lengths from a set of predetermined lengths. The encoder structure remains fixed but its behavior becomes dynamic by selecting different code lengths (e.g., 15000, 16200, 17160, 18000 bits) based on transmission conditions, allowing adaptability without structural complexity changes
Solution Approach 2:
The patent changes the parameter of information bit length to achieve different coding rates. By selecting from predetermined information bit lengths and corresponding code lengths, the system varies the coding rate parameter (e.g., 1/3, 2/5, 1/2, 3/5, 2/3, 4/5, 5/6, 7/8) while maintaining the same encoder structure, thus resolving the contradiction between adaptability and complexity
2Adaptability or versatility
If multiple coding rates are supported with separate encoders, then the coding rate adaptability is improved, but the device complexity increases
Solution Approach 1:
The patent implements universality by designing a single LDPC encoder that can perform multiple coding rate functions. The encoder uses a set of predetermined information bit lengths and code lengths to support multiple coding rates (1/3, 2/5, 1/2, 3/5, 2/3, 4/5, 5/6, 7/8) within one device, eliminating the need for separate encoders for each coding rate while maintaining full multi-rate capability
3Quantity of substance
If the code length is increased to support more data, then the data transmission capacity is improved, but the error correction difficulty increases
Solution Approach 1:
The patent applies segmentation by dividing the long code into structured blocks with predetermined information bit lengths and code lengths. The LDPC code is organized with specific structures (e.g., 15000, 16200, 17160, 18000 bit codes) that segment the large data volume into manageable units, making error correction more tractable while maintaining high transmission capacity through the systematic parity check matrix structure
Data Source
AI summary
A matrix multiplier multiplies the signal output from a first adder by an inverse matrix T−1 of a partial matrix T of a parent parity check matrix, and outputs the multiplication result to a first switch. The output of the matrix multiplier becomes a second parity vector P2. A second switch is switched on at a transmission time of the information word vector ‘s’, a third switch is switched on at a transmission time of the first parity vector P1, and the first switch is switched on at a transmission time of the second parity vector P2. When a puncturing scheme is applied to the parent parity check matrix, a controller controls the first and second switches to puncture the parity according to the corresponding coding rate.