LDPC Parity Permutation Layout for Robust Broadcast Decoding
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Solution Overview
Problem
Current digital broadcasting systems face challenges in providing improved performance and support for various receiving schemes, particularly in high definition digital television and portable broadcasting, due to limitations in signal transmission and reception methods.
Innovation Solution
A transmitter is designed with a Low Density Parity Check (LDPC) encoder, a parity permutator, and a puncturer to perform parity permutation on parity bits by interleaving and puncturing them, optimizing bit group positioning for improved decoding characteristics and error correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If parity bits are transmitted without permutation and puncturing, then the transmission structure is simple, but the decoding performance and error correction capability are insufficient
Solution Approach 1:
The parity bits are divided into multiple bit groups, and each bit group is independently permuted and punctured. This segmentation allows the system to achieve improved decoding performance through structured processing while maintaining manageable complexity by handling each group separately rather than processing all parity bits as a single block.
Solution Approach 2:
Parity permutation and puncturing are performed in advance before transmission. By pre-processing the parity bits to position important bits at specific locations and remove less critical bits, the system improves error correction capability without adding complexity during the decoding phase, as the receiver simply needs to reverse the known permutation pattern.
2Productivity
If all parity bits are transmitted, then error correction capability is maximized, but transmission efficiency and bandwidth utilization are reduced
Solution Approach 1:
Less important parity bits are extracted and removed (punctured) from the transmission stream, while more important parity bits are retained and positioned at specific locations through permutation. This selective extraction allows the system to maintain adequate error correction capability for typical error conditions while improving transmission efficiency by reducing the total number of transmitted bits.
Solution Approach 2:
Different portions of the parity bits are treated differently through permutation, placing bits with different importance levels at different positions. Some positions are designated for high-priority parity bits that provide essential error correction, while other positions can be punctured. This local differentiation of bit quality allows optimized balance between reliability and efficiency.
3Reliability
If parity bits are punctured without group-wise interleaving, then transmission overhead is reduced, but decoding performance under various error patterns deteriorates
Solution Approach 1:
The parity bits are organized into multiple bit groups that are independently interleaved and punctured. This segmentation into manageable groups reduces the overall processing complexity compared to interleaving all parity bits in a single large block, while still providing robust protection against various error patterns through the distributed structure of multiple groups.
Solution Approach 2:
Group-wise interleaving introduces an additional dimension of processing by organizing bits into groups and applying permutation within each group. This multi-dimensional approach (grouping + interleaving + puncturing) creates a more robust structure against burst errors and other error patterns compared to simple sequential processing, while the modular group structure keeps complexity manageable.
Data Source
AI summary
A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate parity bits; a parity permutator configured to perform parity permutation by interleaving the parity bits and group-wise interleaving a plurality of bit groups including the interleaved parity bits; and a puncturer configured to puncture some of the parity bits in the group-wise interleaved bit groups, wherein the parity permutator group-wise interleaves the bit groups such that some of the bit groups are positioned at predetermined positions, respectively, and a remainder of the bit groups are positioned without an order within the group-wise interleaved bit groups.