LDPC Parity Permutation Layout for Efficient Punctured Transmission

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Solution Overview

Problem

Current digital broadcasting systems face challenges in providing improved performance and efficiency in signal transmission and reception, particularly in high-definition digital television and portable broadcasting, due to limitations in existing transmitter and receiver technologies.

Innovation Solution

A transmitter is designed with a Low Density Parity Check (LDPC) encoder, a parity permutator, and a puncturer to perform parity permutation on parity bits, specifically puncturing certain parity bits and interleaving them in a group-wise manner to enhance decoding performance, using a scheme that rearranges bit groups and selects parity bits sequentially and randomly for transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional transmission schemes are used, then system simplicity is maintained, but decoding performance is insufficient

Engineering Contradiction:
Improvedecoding performanceVSAvoidtransmitter structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The parity bits are divided into multiple groups (first parity bit group and second parity bit group) which are then separately permuted and punctured. This segmentation allows different processing schemes to be applied to different parts of the parity bits, improving decoding performance while maintaining manageable system complexity through modular design

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Parity permutation is performed in advance before transmission, where the positions of parity bits are pre-arranged according to specific patterns. This preliminary reorganization of bit positions enables the receiver to achieve better decoding performance without adding complex real-time processing during transmission

Inventive Principle:
Principle #10Preliminary action

2Productivity

If all parity bits are transmitted, then decoding accuracy is maximized, but transmission efficiency decreases

Engineering Contradiction:
Improvetransmission efficiencyVSAvoiddecoding accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

Specific parity bits are extracted and removed (punctured) from the transmitted signal based on predetermined patterns. The patent identifies which parity bits to puncture by applying permutation rules that determine positions to be removed, thereby reducing redundant information transmission while preserving essential decoding capability

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Different puncturing patterns are applied to different groups of parity bits (first and second groups), with each group having its own specific permutation and puncturing scheme. This localized differentiation optimizes the balance between transmission efficiency and decoding accuracy for each subset of parity bits

Inventive Principle:
Principle #3Local quality

3Reliability

If parity bits are permuted in fixed order, then implementation is simple, but decoding performance is limited

Engineering Contradiction:
Improvedecoding performanceVSAvoidpermutation scheme complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The permutation scheme transitions from fixed to dynamic patterns by introducing different permutation rules for different parity bit groups. The patent applies distinct permutation patterns (e.g., different step sizes, different starting positions) to different groups, creating a more adaptive structure that improves decoding performance while remaining implementable through predefined rules

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11711098B2Transmitter and parity permutation method thereof
Publication Date: 2023.07.25 SAMSUNG ELECTRONICS CO LTD
  • US11711098B2 patent drawing
  • US11711098B2 patent drawing
  • US11711098B2 patent drawing

AI summary

A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate parity bits; a parity permutator configured to group-wise interleave a plurality of bit groups including the parity bits; and a puncturer configured to select some of the parity bits in the group-wise interleaved bit groups and puncture the selected parity bits, wherein the parity permutator group-wise interleaves the bit groups such that some of the bit groups at predetermined positions in the bit groups before the group-wise interleaving are positioned serially after the group-wise interleaving and a remainder of the bit groups before the group-wise interleaving are positioned without an order after the group-wise interleaving so that the puncturer selects parity bits included in the some of the bit groups sequentially and selects parity bits included in the remainder of the bit groups without an order.