LDPC Parity Permutation for Punctured Digital Broadcasting

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Solution Overview

Problem

Current digital broadcasting systems face challenges in providing improved performance and versatility for various receiving schemes, particularly in high definition digital television and portable broadcasting, due to limitations in signal transmission and reception methods.

Innovation Solution

A transmitter is designed with a Low Density Parity Check (LDPC) encoder, a parity permutator, and a puncturer to perform parity permutation on parity bits through interleaving and puncturing, optimizing the arrangement of bit groups for improved decoding characteristics and error correction in digital broadcasting.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional signal transmission methods are used in digital broadcasting systems, then the system structure remains simple, but the error correction performance and decoding efficiency are insufficient for high definition digital television and portable broadcasting

Engineering Contradiction:
Improveerror correction performanceVSAvoidsignal transmission structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The parity bits are divided into multiple bit groups that are separately permuted and processed. The parity permutator divides the parity bit sequence into several groups and applies different permutation patterns to each group, enabling improved error correction performance through structured segmentation of the code blocks.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Parity permutation is performed in advance before transmission, preparing the parity bits in an optimized arrangement that anticipates potential error patterns. The puncturing pattern is also predetermined based on the permutation result, allowing the receiver to efficiently reconstruct and decode the transmitted signal without requiring complex real-time processing.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If parity bits are punctured to reduce transmission overhead, then the transmission efficiency improves, but the decoding performance may deteriorate without proper permutation

Engineering Contradiction:
Improvetransmission efficiencyVSAvoiddecoding performance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

Different portions of the parity bit sequence are treated differently through selective puncturing. The permutation arrangement ensures that punctured positions correspond to less critical parity bits for certain error patterns, while preserving more important parity bits in non-punctured positions. This local differentiation maintains decoding performance while improving transmission efficiency.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The permutation pattern and puncturing ratio are adjusted as parameters to optimize the balance between transmission efficiency and decoding performance. By changing the permutation pattern according to different transmission conditions and code rates, the system adapts to maintain reliable decoding while maximizing the use of transmitted bits.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11515892B2Transmitter and parity permutation method thereof
Publication Date: 2022.11.29 SAMSUNG ELECTRONICS CO LTD
  • US11515892B2 patent drawing
  • US11515892B2 patent drawing
  • US11515892B2 patent drawing

AI summary

A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate parity bits; a parity permutator configured to perform parity permutation by interleaving the parity bits and group-wise interleaving a plurality of bit groups including the interleaved parity bits; and a puncturer configured to puncture some of the parity bits in the group-wise interleaved bit groups, wherein the parity permutator group-wise interleaves the bit groups such that some of the bit groups are positioned at predetermined positions, respectively, and a remainder of the bit groups are positioned without an order within the group-wise interleaved bit groups.