LDPC Parity Permutation for Puncturing-Resilient Transmission

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current signal transmission methods for digital broadcasting lack efficient mechanisms for generating additional parity bits, which are crucial for improved decoding performance and error correction in receivers.

Innovation Solution

A transmitter system that includes a Low Density Parity Check (LDPC) encoder, a parity permutator, a puncturer, and an additional parity generator, which interleave and puncture parity bits using specific patterns to generate additional parity bits for improved decoding performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If puncturing is applied to reduce transmission overhead, then transmission efficiency is improved, but decoding performance deteriorates due to loss of parity bits

Engineering Contradiction:
Improvetransmission efficiencyVSAvoiddecoding performance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by generating additional parity bits in advance based on the puncturing pattern before transmission. The receiver uses these pre-generated additional parity bits to compensate for the punctured parity bits, thereby maintaining decoding performance while allowing aggressive puncturing for transmission efficiency.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the parameter of parity bit generation by creating additional parity bits that are different from the original parity bits. These additional parity bits are generated using a specific pattern (e.g., reversing the order of original parity bits) to provide complementary information that helps in decoding when original parity bits are punctured.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If additional parity bits are generated to improve decoding performance, then error correction capability is enhanced, but transmission overhead increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoidtransmission overhead
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent applies partial action by generating only the necessary additional parity bits corresponding to the punctured portions, rather than generating complete redundant parity sets. This provides sufficient error correction capability for the punctured bits without unnecessarily increasing transmission overhead with excessive redundancy.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If complex interleaving patterns are used to optimize parity distribution, then decoding performance is improved, but system complexity increases

Engineering Contradiction:
Improvedecoding performanceVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the parity bits into groups and applies different interleaving patterns to different segments. The first interleaving pattern is applied to the original parity bits, and the second interleaving pattern is applied to the additional parity bits. This segmentation allows complex interleaving to be managed in smaller, more manageable parts while maintaining overall decoding performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses periodic interleaving patterns that repeat at regular intervals, which simplifies the implementation of complex interleaving. The patterns are designed to be applied periodically across the parity bit sequences, reducing the computational complexity compared to completely arbitrary complex interleaving while still achieving good parity distribution.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11658770B2Transmitter and method for generating additional parity thereof
Publication Date: 2023.05.23 SAMSUNG ELECTRONICS CO LTD
  • US11658770B2 patent drawing
  • US11658770B2 patent drawing
  • US11658770B2 patent drawing

AI summary

A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate an LDPC codeword including the input bits and parity bits to be transmitted in a current frame; a parity permutator configured to interleave the parity bits and group-wise interleave a plurality of parity bit groups configuring the interleaved parity bits based on a group-wise interleaving pattern including a first pattern and a second pattern to perform parity permutation; a puncturer configured to puncture at least some of the group-wise interleaved parity bit groups; and an additional parity generator configured to select at least some of the punctured parity bit groups to generate additional parity bits to be transmitted in a previous frame of the current frame, based on the first pattern and the second pattern.