LDPC Parity Interleaving for Variable-Length Signaling Puncturing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current channel encoding and modulation techniques for signaling information in broadcast systems lack robustness and efficiency, particularly in next-generation digital broadcasting systems.
Innovation Solution
A parity interleaving technique is introduced, involving a processor to generate and segment parity bits of an LDPC codeword into groups for group-wise interleaving and puncturing, optimized for signaling information transmission, using specific sequences and calculations for puncturing size determination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional channel encoding and modulation techniques are used for signaling information transmission, then the system maintains simplicity, but the robustness and efficiency of signaling information transmission deteriorates
Solution Approach 1:
The patent segments the parity bits of the LDPC codeword into multiple groups (first parity bit group and second parity bit group) and applies different puncturing strategies to each group. This segmentation allows the system to selectively preserve important parity information while reducing overall redundancy, thereby improving signaling information transmission robustness without requiring complete transmission of all parity bits.
Solution Approach 2:
The patent applies different quality levels of protection to different parts of the codeword. Specifically, the first parity bit group receives different treatment compared to the second parity bit group, with optimized puncturing rates applied locally to each group based on their respective importance and characteristics. This local differentiation enhances overall system robustness while maintaining efficiency.
2Reliability
If parity bits are fully transmitted without puncturing, then the reliability of signaling information transmission is improved, but the transmission efficiency and bandwidth utilization deteriorates
Solution Approach 1:
The patent applies partial puncturing to the parity bit groups rather than transmitting all parity bits or applying uniform puncturing. By selectively puncturing portions of the parity bit groups based on calculated puncturing rates, the system achieves optimal balance between reliability and transmission efficiency, transmitting only the necessary amount of parity information required for adequate error correction.
Solution Approach 2:
The patent dynamically adjusts the puncturing rate parameter based on channel conditions and signaling information characteristics. By changing the puncturing rate parameter, the system can adaptively optimize the trade-off between transmission efficiency and reliability, allowing higher puncturing rates (better efficiency) when channel conditions are good and lower puncturing rates (better reliability) when channel conditions are poor.
3Device complexity
If the LDPC codeword length is fixed at 16200 bits, then the encoding structure is simplified, but the adaptability to different signaling information amounts deteriorates
Solution Approach 1:
The patent introduces dynamic adaptability into the fixed-length LDPC coding framework by implementing variable puncturing rates for different parity bit groups based on the actual signaling information amount. This allows the effective transmission length to be dynamically adjusted while maintaining the fixed 16200-bit codeword structure, thereby achieving both structural simplicity and adaptability to different information volumes.
Data Source
AI summary
A parity interleaving apparatus and method for variable length signaling information are disclosed. A parity interleaving apparatus according to an embodiment of the present invention includes a processor configured to generate a parity bit string for parity puncturing by segmenting parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, into a plurality of groups, and group-wise interleaving the groups using an order of group-wise interleaving; and memory configured to provide the parity bit string for parity puncturing to a parity puncturing unit.


