LDPC Parity Interleaving for Robust Variable-Length Signaling

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Solution Overview

Problem

Current channel encoding and modulation techniques for signaling information in broadcast systems lack robustness and efficiency, particularly in next-generation digital broadcasting systems.

Innovation Solution

A parity interleaving apparatus and method that segment and group-wise interleave parity bits of an LDPC codeword, optimizing parity puncturing based on a specific sequence and code rate, to enhance the transmission of signaling information.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional channel encoding and modulation techniques are used for signaling information transmission, then the system maintains basic functionality, but the robustness and transmission efficiency are insufficient

Engineering Contradiction:
Improverobustness of signaling information transmissionVSAvoidtransmission efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The parity bits are divided into multiple groups (first parity group and second parity group) which are then separately interleaved using different group-wise interleaving orders. This segmentation allows differential treatment of parity bits to optimize both error correction robustness and transmission efficiency simultaneously

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different portions of the parity bits (different groups) are assigned different interleaving orders, creating local variations in the encoding structure. This local quality differentiation enables some parity groups to provide enhanced robustness while others optimize for transmission efficiency

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If the amount of signaling information increases, then more information can be transmitted, but the optimization of shortening and puncturing becomes more complex

Engineering Contradiction:
Improveamount of signaling informationVSAvoidcomplexity of shortening and puncturing optimization
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The system dynamically adjusts the shortening and puncturing parameters based on the actual amount of signaling information to be transmitted. The parity bit grouping and interleaving configuration can be adapted according to the information volume, allowing optimal performance across different signaling scenarios without fixed complex structures

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11381256B2Parity interleaving apparatus for encoding variable-length signaling information and parity interleaving method using same
Publication Date: 2022.07.05 ELECTRONICS & TELECOMM RES INST
  • US11381256B2 patent drawing
  • US11381256B2 patent drawing
  • US11381256B2 patent drawing

AI summary

A parity interleaving apparatus and method for variable length signaling information are disclosed. A parity interleaving apparatus according to an embodiment of the present invention includes a processor configured to generate a parity bit string for parity puncturing by segmenting parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, into a plurality of groups, and group-wise interleaving the groups using an order of group-wise interleaving; and memory configured to provide the parity bit string for parity puncturing to a parity puncturing unit.