Two-Level LDPC Code Structure for Long-Code Error Correction

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Solution Overview

Problem

The complexity of encoder/decoder systems for long Low Density Parity Check (LDPC) codes increases with codeword length, making it impractical to implement in applications like flash memory, where longer codes are needed for improved bit and frame error rate performance.

Innovation Solution

A 2-level LDPC code system is introduced, where a first LDPC code is defined by a parity check matrix H1, and a second LDPC code is defined by a parity check matrix H2 that includes H1 and a zero matrix, along with a supplementary matrix, allowing for error detection and correction with minimal additional layout area and complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If longer LDPC codes are used to improve error rate performance, then bit error rate and frame error rate performance are improved, but encoder/decoder complexity increases

Engineering Contradiction:
Improveerror rate performanceVSAvoidencoder/decoder complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides a long LDPC code into multiple shorter component codes (first LDPC code and second LDPC code), each with its own parity check matrix. Instead of implementing one complex long code, the system segments the coding task into multiple simpler short codes that can be processed independently, reducing the complexity of individual encoder/decoder units while maintaining the effective error correction capability through concatenation or multiplication of the component codes.

Inventive Principle:
Principle #1Segmentation

2Reliability

If longer LDPC codes are used to improve error rate performance, then bit error rate and frame error rate performance are improved, but layout area increases

Engineering Contradiction:
Improveerror rate performanceVSAvoidlayout area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent segments the long code implementation into multiple short code units, each requiring smaller hardware resources and layout area. By implementing separate first and second LDPC modules with their own compact parity check matrices, the total area is distributed across multiple small units rather than requiring one large continuous area, making the implementation more suitable for integrated circuits and flash memory applications.

Inventive Principle:
Principle #1Segmentation

3Measurement precision

If more parity check equations are added to improve decoding accuracy, then decoding accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvedecoding accuracyVSAvoiddevice complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent divides the parity check equations into two separate sets: first parity check equations from the first parity check matrix and second parity check equations from the second parity check matrix. Each set operates independently on different portions or aspects of the codeword, allowing the system to achieve high decoding accuracy through multiple specialized checks rather than one complex unified check, thereby reducing overall device complexity.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8555139B1Integrated 2-level low density parity check (LDPC) codes
Publication Date: 2013.10.08 MARVELL ASIA PTE LTD
  • US8555139B1 patent drawing
  • US8555139B1 patent drawing
  • US8555139B1 patent drawing

AI summary

A method includes applying an error-detecting code to first input data to generate first protected data and applying the error-detecting code to second input data to generate second protected data. The method also includes generating a first encoded codeword by encoding the first protected data using a first low density parity check (LDPC) code, and generating an output by performing a binary exclusive-or operation on the first protected data and the second protected data. The method further includes generating a second encoded codeword by encoding the output of the of the binary exclusive-or operation using a second LDPC code, and multiplexing data for transmission over a communications channel based on (i) the first encoded codeword and (ii) the second encoded codeword.