LDPC Signal Reception Using Partial Parallel Scheduling

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Solution Overview

Problem

Conventional LDPC decoding methods using sum-product iterative algorithms are time-consuming due to sequential bit and check node operations, leading to increased processing time delays.

Innovation Solution

The implementation of Partial Parallel Scheduling (PPS) in LDPC decoding, where bit node operations are performed on PPS groups and check node operations are conducted on connected nodes, allowing for a scheduled order of node operations to reduce processing time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If sequential bit node and check node operations are performed in conventional LDPC decoding, then decoding accuracy is maintained, but processing time increases

Engineering Contradiction:
Improveprocessing timeVSAvoiddecoding speed
Core Design Contradiction:
Loss of timeVSProductivity

Solution Approach 1:

The patent divides the LDPC decoding process into multiple independent processing units, where bit node operations and check node operations are segmented into separate functional blocks that can operate independently. This segmentation allows parallel execution of decoding operations, reducing the sequential processing time while maintaining decoding accuracy through coordinated operation of the divided units.

Inventive Principle:
Principle #1Segmentation

2Reliability

If more iterations are performed in LDPC decoding, then Bit Error Rate performance improves, but processing time increases

Engineering Contradiction:
ImproveBit Error Rate performanceVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements continuous parallel processing where multiple bit node operations and check node operations execute simultaneously in pipelined fashion. This continuity allows the decoding process to maintain high throughput across multiple iterations, achieving better BER performance without linearly increasing processing time, as the parallel architecture keeps all processing units actively engaged throughout the iteration process.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS7937642B2Apparatus and method for receiving signal in a communication system
Publication Date: 2011.05.03 SAMSUNG ELECTRONICS CO LTD
  • US7937642B2 patent drawing
  • US7937642B2 patent drawing
  • US7937642B2 patent drawing

AI summary

An apparatus and method of receiving a signal in a communication system are provided, in which a signal is received and decoded by a PPS scheme being an LDPC decoding scheme in which an order of performing a node operation is scheduled.