LDPC-RAID Decoding Order Using Syndrome Weight Prioritization
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Solution Overview
Problem
Existing data storage devices face increased latency due to repeated iterations of joint LDPC and RAID decoding processes when multiple flash memory units fail initial decoding, as they lack an efficient decoding order for these schemes.
Innovation Solution
An ECC ordering system determines a decoding schedule based on metrics such as syndrome weight and combined bit error rate to order flash memory units for joint LDPC and RAID decoding, reducing the number of iterations needed to correct errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple decoding processes are executed on the same failed page to improve error correction chances, then error correction capability is improved, but decoding latency increases
Solution Approach 1:
The patent applies preliminary action by calculating syndrome weights for all failed pages before executing the joint decoding process. This pre-calculation allows the system to determine the optimal decoding order in advance, ensuring that pages with lower syndrome weights (higher likelihood of successful decoding) are decoded first. This preliminary ordering reduces the need for multiple iterations on the same page, thereby reducing decoding latency while maintaining error correction capability.
2Reliability
If a joint decoding scheme is implemented to handle colossal errors, then error correction capability is improved, but device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the joint decoding process into distinct phases: first calculating syndrome weights for all failed pages using the RAID decoding scheme, then ordering the pages based on these weights, and finally executing the LDPC decoding process in the determined order. This segmentation of the decoding process into manageable stages reduces the overall complexity compared to implementing a fully simultaneous joint decoding scheme, while still maintaining the ability to handle colossal errors.
3Reliability
If repeated iterations are performed on failed pages during joint decoding, then error correction capability is improved, but productivity decreases
Solution Approach 1:
The patent applies feedback by using the syndrome weight calculations as a guide for the decoding order. The syndrome weights provide feedback information about the likelihood of successful decoding for each page, allowing the system to prioritize pages that are more likely to succeed. This feedback mechanism reduces the number of repeated iterations needed on failed pages, thereby improving decoding throughput while maintaining the error correction capability of the joint decoding scheme.
Data Source
AI summary
A data storage device includes an error correction code (ECC) ordering system that determines a decoding schedule in which two or more flash memory units (FMUs) that have failed an initial decoding process are to be decoded using a joint decoding scheme. The ECC ordering system generates the decoding schedule based on a metric associated with each FMU. The metric on which the decoding schedule is based is a syndrome weight associated with each FMU or is a combined bit error rate (BER) associated with each FMU. When the decoding schedule has been generated, the ECC ordering system causes a joint decoding operation to be executed on the FMUs in the order specified by the decoding schedule.