LDPC Rate Matching with Added Symbols for Smooth Sensitivity
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Solution Overview
Problem
Existing LDPC rate matching schemes in wireless communication standards face issues with sensitivity being a non-continuous function due to large discontinuities in punctured bits per codeword, leading to unnecessary decoding of codewords and inefficiencies in receiver sensitivity, particularly for small payloads.
Innovation Solution
Incorporating additional LDPC symbols to adjust the number of available bits for error correction, using techniques such as bit shortening, puncturing, and repeating to minimize punctured bits and improve sensitivity by reducing parity puncture rate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing LDPC rate matching schemes are used, then the encoding process can be completed, but sensitivity becomes a non-continuous function due to large discontinuities in punctured bits per codeword
Solution Approach 1:
The patent changes the parameter of available bits for error correction by incorporating additional LDPC symbols. This adjusts the number of parity bits and reduces the parity puncture rate, transforming the discrete discontinuous sensitivity function into a more continuous one across different payload lengths.
Solution Approach 2:
The patent dynamically adjusts the rate matching parameters based on payload length. By incorporating additional LDPC symbols when needed, the system adapts the coding scheme to maintain continuous sensitivity characteristics across varying transmission conditions and payload sizes.
2Reliability
If additional symbols are incorporated to adjust available bits, then receiver sensitivity is enhanced, but the complexity of the encoding process increases
Solution Approach 1:
The patent segments the LDPC codeword into information bits and parity bits, with the ability to selectively puncture parity bits. By controlling the number of additional LDPC symbols and their placement, the system enhances sensitivity without requiring complete re-encoding, thus limiting the increase in complexity.
Solution Approach 2:
The patent applies different treatments to different parts of the codeword. Information bits are protected with full redundancy, while parity bits are selectively punctured based on rate matching requirements. This local differentiation allows sensitivity enhancement through targeted addition of LDPC symbols without uniformly increasing complexity across the entire encoding process.
3Productivity
If the number of punctured bits is reduced, then decoding efficiency is improved, but the number of available bits for error correction must be precisely controlled
Solution Approach 1:
The patent performs preliminary calculation of the number of additional LDPC symbols needed before the actual encoding process. By determining the required number of symbols based on payload length and desired code rate, the system prepares the exact amount of redundancy needed, avoiding both over-provisioning and under-provisioning of error correction bits.
Solution Approach 2:
The patent incorporates feedback mechanisms where the receiver sends acknowledgments about decoding success or failure. Based on this feedback, the transmitter can adjust the number of additional LDPC symbols in subsequent transmissions, refining the precision of available bits control over time and improving decoding efficiency through iterative optimization.
Data Source
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AI summary
A system (105) may include a transmitter (120) and one or more processors (2010). The one or more processors (2010) may be configured to identify a number of additional symbols to be added to existing symbols corresponding to payload data to be encoded. The one or more processors (2010) may be configured to calculate, based on a length of the payload data and the number of additional symbols, a number of available bits for error correction. The one or more processors (2010) may be configured to encode, via an low-density parity-check (LDPC) encoder (130), the payload data using an LDPC code to generate a codeword having a number of parity bits corresponding to the available bits. The one or more processors (2010) may be configured to transmit, via the transmitter (120), the encoded data.