Self-Decodable LDPC Redundancy Versions for Faster Wireless Decoding

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Solution Overview

Problem

Existing wireless communication systems face challenges in efficiently encoding and decoding binary data due to errors introduced during storage, transmission, and processing, particularly in high-speed data transmission scenarios, necessitating improved encoding and decoding techniques for LDPC codes to support mobile broadband access and other multi-access technologies.

Innovation Solution

The implementation of self-decodable redundancy versions (RVs) for systematic codes, such as LDPC codes, with bit re-ordering and parity bit distribution techniques in encoders and decoders to enhance encoding and decoding efficiency, enabling faster hardware processing and reduced costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional encoding and decoding techniques are used for LDPC codes, then error correction capability is provided, but encoding and decoding efficiency is insufficient for high-speed data transmission

Engineering Contradiction:
Improveencoding and decoding efficiencyVSAvoiderror correction capability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The encoded bit stream is segmented into different redundancy versions (RVs) that can be independently decoded. Each RV contains a self-decodable portion that can be decoded without requiring other RVs, enabling parallel processing and improving encoding/decoding efficiency while maintaining error correction capability through distributed redundancy

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The encoder performs preliminary organization of parity bits into self-decodable redundancy versions before transmission. This preliminary arrangement ensures that each RV contains sufficient information for independent decoding, eliminating the need for complex sequential processing and improving overall processing efficiency

Inventive Principle:
Principle #10Preliminary action

2Reliability

If redundancy versions are used for error correction, then reliability is improved, but device complexity increases due to additional encoding and decoding operations

Engineering Contradiction:
Improveerror correction capabilityVSAvoidencoder and decoder complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Each redundancy version is designed to be self-decodable, meaning it contains all necessary information for independent decoding without requiring other RVs. This self-service capability simplifies the decoder design by eliminating the need for complex multi-RV coordination logic and reduces device complexity while maintaining reliability

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system changes the parameter organization of parity bits across different RVs to create self-decodable structures. By adjusting how parity bits are distributed and organized in each RV, the system achieves both improved reliability and reduced complexity through simpler decoding operations

Inventive Principle:
Principle #35Parameter changes

3Productivity

If bit re-ordering and parity bit distribution techniques are implemented, then encoding efficiency is improved, but the complexity of the encoding process increases

Engineering Contradiction:
Improveencoding efficiencyVSAvoidencoding process complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The encoder performs bit re-ordering and parity bit distribution as preliminary actions during the encoding process. By organizing bits into self-decodable RVs upfront, the system improves subsequent decoding efficiency without requiring complex real-time processing, as the complexity is shifted to a preliminary organization stage

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12476733B2Communication techniques with self-decodable redundancy versions (RVs) using systematic codes
Publication Date: 2025.11.18 QUALCOMM INC
  • US12476733B2 patent drawing
  • US12476733B2 patent drawing
  • US12476733B2 patent drawing

AI summary

The present disclosure provides self-decodable redundancy versions for a systematic code. An apparatus for wireless communications includes at least one processor coupled with a memory and comprising encoder circuitry configured to encode a set of information bits using a systematic code to generate an encoded bit stream with information bits and parity bits, and bit ordering circuitry configured to re-order bits in the encoded bit stream to distribute the information bits and the parity bits. The apparatus includes a transmitter configured to transmit the re-ordered bits in accordance with a radio technology via one or more antenna elements situated proximate the receiver.