LDPC Encoding Matrix Segmentation for Error Floor and Burst Errors
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Solution Overview
Problem
Current data transmission using LDPC codes faces challenges in maintaining excellent communication quality, particularly due to error floor phenomena and burst errors in communication channels, which affect decoding performance and power consumption.
Innovation Solution
The implementation of a data processing device and method that encodes information bits into LDPC codes with specific code lengths and code rates using parity check matrices, combined with interleaving techniques such as parity interleave and column twist interleave, to improve resistance to burst errors and maintain performance in AWGN channels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If LDPC code with longer code length is used to approach Shannon limit, then error correcting capability is improved, but device complexity and processing time increase
Solution Approach 1:
The parity check matrix H is divided into sub-matrices (information matrix part HA and parity matrix part HT), and further segmented into 360-column blocks. Each block is processed independently using initial value tables, allowing parallel processing and reducing overall decoder complexity while maintaining long code length benefits.
Solution Approach 2:
Initial value tables are pre-calculated and stored for each 360-column block. These tables contain pre-computed parity check information that is prepared in advance, eliminating the need for complex real-time calculations during decoding operations.
2Ease of manufacture
If standard LDPC encoding is used, then implementation simplicity is maintained, but resistance to burst errors is insufficient
Solution Approach 1:
The code is divided into information bits and parity bits with distinct matrix parts. The parity matrix part HT is specifically structured to provide burst error protection while keeping the information matrix part HA relatively simple for easy encoding implementation.
Solution Approach 2:
Different parts of the parity check matrix have different properties: the information matrix part HA uses initial value tables for simple encoding, while the parity matrix part HT is designed with specific structures to enhance burst error resistance in targeted regions.
3Speed
If conventional parity check matrix structure is used, then decoding speed is maintained, but error floor phenomenon occurs
Solution Approach 1:
The parity check matrix parameters are optimized by dividing into 360-column blocks and using specific initial value tables. The matrix structure parameters (row weights, column weights, and element distributions) are carefully selected to eliminate error floor while maintaining decoding speed through efficient block processing.
Data Source
AI summary
The present technology relates to a data processing device and a data processing method so that an LDPC code with a good bit error rate is provided.An LDPC encoder encodes by an LDPC code whose code length is 16200 bits and code rate is 8/15. The LDPC code includes information bits and parity bits. A parity check matrix H includes an information matrix part corresponding to the information bits of the LDPC code and a parity matrix part corresponding to the parity bits. The information matrix part of the parity check matrix H is represented by a parity check matrix initial value table that indicates a position of an element 1 of the information matrix part for each 360 columns. The present technology is applicable to a case in which LDPC encoding and LDPC decoding are performed.