LDPC Transmitter Shortening Using Nonsequential Zero-Padded Bit Groups
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Solution Overview
Problem
Current digital broadcasting systems face challenges in efficiently managing bit error rates and frame error rates due to limitations in signal transmission and reception methods, particularly in high-definition digital television and portable broadcasting scenarios.
Innovation Solution
A transmitter is designed with an outer encoder, zero padder, and LDPC encoder to encode input bits, pad zero bits based on a preset shortening pattern, and map these bits into Low Density Parity Check (LDPC) information bits, improving bit error rate (BER) and frame error rate (FER) performance by positioning LDPC information bits strategically.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If zero bits are padded to remaining bits in bit groups based on a predetermined shortening pattern, then bit error rate (BER) and frame error rate (FER) performance is improved, but the device complexity increases due to additional encoding components
Solution Approach 1:
The encoder divides the bit stream into multiple bit groups of equal size, applying different operations to different groups. This segmentation allows systematic placement of zero bits in specific groups while maintaining processing efficiency and reducing overall system complexity despite the added functionality.
Solution Approach 2:
The system performs preliminary actions by pre-determining which bit groups will receive zero bits based on a shortening pattern before actual encoding. This advance planning optimizes the positioning of information bits and reduces error rates without requiring complex real-time decision-making during encoding.
2Reliability
If zero bits are padded to remaining bits in bit groups based on a predetermined shortening pattern, then frame error rate (FER) performance is improved, but the processing time increases
Solution Approach 1:
By segmenting the bit stream into fixed-size groups and pre-determining which groups receive zero bits, the system enables parallel processing and reduces the computational complexity of each individual group, thereby minimizing the overall encoding time despite the additional functionality.
Solution Approach 2:
The system changes parameters by using a predetermined shortening pattern that defines fixed positions for zero bits. This parameter-based approach allows the encoder to efficiently manage the padding process without complex real-time calculations, reducing processing time while maintaining improved FER performance.
Data Source
AI summary
A transmitter is provided. The transmitter includes: an outer encoder configured to encode input bits to generate outer-encoded bits including the input bits and parity bits; a zero padder configured to generate a plurality of bit groups each of which is formed of a same number of bits, maps the outer-encoded bits to some of the bits in the bit groups, and pads zero bits to remaining bits in the bit groups, based on a predetermined shortening pattern, thereby to constitute Low Density Parity Check (LDPC) information bits; and an LDPC encoder configured to encode the LDPC information bits, wherein the remaining bits in which zero bits are padded include some of the bit groups which are not sequentially disposed in the LDPC information bits.