LDPC Transmitter Shortening Pattern for BER and FER Control
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Solution Overview
Problem
Current digital broadcasting systems face challenges in providing improved performance and error rates due to limitations in signal transmission and reception, particularly in high-definition digital television and portable broadcasting, where existing methods fail to effectively manage bit errors and frame errors.
Innovation Solution
A transmitter is designed with an outer encoder, zero padder, and LDPC encoder to encode input bits, pad zero bits, and map them based on a preset shortening pattern to achieve the required number of bits for LDPC encoding, thereby improving bit error rate (BER) and frame error rate (FER) performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If zero bits are padded to outer-encoded bits to achieve required bit length for LDPC encoding, then the number of bits satisfies the predetermined requirement, but the bit error rate and frame error rate performance deteriorates without proper positioning
Solution Approach 1:
The patent applies local quality by differentiating the treatment of different bit positions. Specifically, zero bits are strategically padded at non-sequence positions (determined by shortening patterns) rather than uniformly across all positions. This localized approach ensures that critical information bits maintain optimal positioning while meeting the required bit length, thereby preserving BER and FER performance.
Solution Approach 2:
The patent implements preliminary action by pre-determining shortening patterns before the actual encoding process. These patterns identify which bit positions should receive zero padding in advance. By establishing this framework beforehand, the system ensures that outer-encoded bits are mapped to optimal positions and zero bits are inserted at predetermined non-sequence positions, preventing performance degradation before it occurs.
2Ease of operation
If outer-encoded bits are mapped to bit groups sequentially, then the mapping process is simple, but the bit error rate and frame error rate performance is suboptimal
Solution Approach 1:
The patent applies segmentation by dividing the bit stream into distinct categories: sequence positions and non-sequence positions. The zero padder operates on non-sequence positions within bit groups, while sequence positions receive outer-encoded bits through mapping. This segmentation allows the system to maintain simple group-based processing while achieving optimal bit positioning for improved reliability.
Solution Approach 2:
The patent changes the positioning parameter of bits by introducing shortening patterns that dictate where zero bits should be inserted. Instead of uniform sequential mapping, the system modifies the position parameters of bits based on predetermined patterns, causing outer-encoded bits to be mapped to sequence positions while zero bits occupy non-sequence positions, thereby improving BER and FER performance.
3Quantity of substance
If zero bits are padded to all bit groups uniformly, then the required number of bits is achieved, but the positioning of LDPC information bits becomes suboptimal
Solution Approach 1:
The patent applies local quality by restricting zero bit padding to specific non-sequence positions within bit groups rather than uniformly across all positions. This localized padding strategy preserves the precision of LDPC information bit positioning in sequence positions while still achieving the required total bit count through selective zero insertion at predetermined locations.
Solution Approach 2:
The patent implements preliminary action by pre-establishing shortening patterns that identify which positions should receive zero padding. These patterns are determined before the encoding process, allowing the system to maintain precise positioning of LDPC information bits in sequence positions while ensuring the required bit quantity is achieved through advance planning of zero bit placement.
Data Source
AI summary
A transmitter is provided. The transmitter includes: an outer encoder configured to encode input bits to generate outer-encoded bits including the input bits and parity bits; a zero padder configured to generate a plurality of bit groups each of which is formed of a same number of bits, determine whether a number of the outer-encoded bits satisfies a predetermined number of bits required according to at least one of a code rate and a code length for Low Density Parity Check (LDPC) encoding, pads zero bits to some of the bits in the bit groups if the number of the outer-encoded bits is less than the predetermined number of bits, and maps the outer-encoded bits to remaining bits in the bit groups, based on a predetermined shortening pattern, thereby to constitute LDPC information bits; and an LDPC encoder configured to encode the LDPC information bits, wherein the some of the bits, in which zero bits are padded, are included in some of the bit groups which are not sequentially disposed in the LDPC information bits.