LDPC Encoding with Sparse Parity-Check Matrix Segmentation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional encoding methods for Low-Density Parity-Check (LDPC) codes result in high computational complexity due to large numbers of non-zero elements in matrices, leading to increased circuit scale and computational load.

Innovation Solution

The method involves sparse matrix computations by dividing the multiplication of the parity-check matrix and information bit sequence into multiple steps, using submatrices and inverse matrices to reduce the size of matrices multiplied and perform computations using sparse matrices, thereby reducing the overall computational load and circuit scale.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conventional encoding methods use a lower triangular matrix or generator matrix, then encoding can be performed, but the number of non-zero elements increases and the amount of computations increases

Engineering Contradiction:
Improveencoding capabilityVSAvoidamount of computations
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The parity-check matrix H is segmented into submatrices (H11, H12, H21, H22) arranged in a block structure. This segmentation allows the encoding process to operate on smaller submatrices rather than the full matrix, reducing the number of non-zero elements that need to be processed and thereby reducing computational complexity while maintaining encoding capability.

Inventive Principle:
Principle #1Segmentation

2Ease of manufacture

If the parity-check matrix is transformed into a lower triangular matrix or generator matrix, then encoding can be performed, but the circuit scale increases

Engineering Contradiction:
Improveencoding capabilityVSAvoidcircuit scale
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The matrix is divided into block submatrices, allowing the circuit to process smaller matrix blocks independently. This segmentation reduces the overall circuit scale required for encoding while preserving the ability to perform encoding operations through structured matrix multiplication of the segmented components.

Inventive Principle:
Principle #1Segmentation

3Ease of operation

If fundamental matrix operations are performed on the parity-check matrix, then a lower triangular matrix is acquired, but non-zero elements increase and computational load increases

Engineering Contradiction:
Improvematrix structureVSAvoidnumber of non-zero elements
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

Instead of performing fundamental matrix operations on the complete parity-check matrix which would create many non-zero elements, the matrix is segmented into submatrices. Operations are then performed on these smaller submatrices, achieving the desired lower triangular structure while keeping the number of non-zero elements manageable and computational load reduced.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The segmentation approach applies different structural properties to different blocks of the matrix. By making each submatrix have appropriate local structure (with controlled non-zero elements), the overall matrix achieves the desired operational properties without globally increasing the number of non-zero elements.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9484959B2Error correction encoding method and error correction encoding device
Publication Date: 2016.11.01 MITSUBISHI ELECTRIC CORP
  • US9484959B2 patent drawing
  • US9484959B2 patent drawing
  • US9484959B2 patent drawing

AI summary

An error correction encoding device 1 includes a sparse matrix computing unit 2 that computes exclusive OR of a submatrix, in a parity-check matrix, corresponding to an information bit sequence, and the information bit sequence on the basis of the position of 1 in the submatrix to calculate a vector, a fundamental matrix operator 3 that calculates a predetermined matrix by performing a predetermined fundamental matrix operation on a submatrix, in the parity-check matrix, corresponding to a parity bit sequence, and a matrix multiplier 4 that calculates the parity bit sequence by multiplying the predetermined matrix which the fundamental matrix operator 3 calculates, and the vector which the sparse matrix computing unit 2 calculates.