LDPC Subcode Interleaving for NAND Read Threshold Calibration
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Solution Overview
Problem
Low-cost memory solutions for cold storage products face challenges in maintaining reliability due to relaxed specifications and reduced performance requirements, which are exacerbated by the degradation of error correction code (ECC) performance when increasing programming states or reducing ECC redundancy.
Innovation Solution
The implementation of subcodes and convolutional-based low-density parity check (LDPC) interleaved coding schemes, where each subcode is stored in a different page of a word line, allowing for improved error correction and read threshold calibration, reducing sensitivity to page bit error rate variations and maintaining good random read performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If logical scaling is used to store more information per memory cell by increasing the number of programming states, then memory cost is reduced, but ECC performance degrades by introducing more errors
Solution Approach 1:
The patent divides the memory system into multiple word lines with different coding schemes. Some word lines use traditional ECC while others use the new convolutional-based LDPC interleaved coding. This segmentation allows the system to accommodate higher density cells with more programming states while maintaining reliable error correction through diversified coding approaches across different memory segments.
2Quantity of substance
If ECC redundancy is reduced to achieve memory cost reduction, then memory cost is reduced, but ECC performance is weakened
Solution Approach 1:
The patent changes the fundamental parameters of the error correction code by introducing convolutional-based LDPC interleaved coding with subcodes stored in different pages. This parameter change enables the system to achieve the same or better error correction performance with reduced redundancy compared to traditional ECC schemes, thereby reducing memory cost while maintaining reliability.
3Reliability
If subcodes are stored in different pages of a word line for convolutional-based LDPC interleaved coding, then error correction capability is improved and read threshold calibration is simplified, but device complexity increases
Solution Approach 1:
The patent segments the LDPC code into multiple subcodes that are stored in different pages of a word line. Each subcode can be independently decoded, which simplifies the decoding process and threshold calibration compared to decoding the entire code at once. This segmentation reduces the computational complexity while maintaining strong error correction capability through the interleaved structure.
4Reliability
If traditional ECC is used with high-density memory cells, then error correction is provided, but sensitivity to page bit error rate variations increases and random read performance degrades
Solution Approach 1:
The patent introduces an additional dimension of interleaving across pages by storing subcodes in different pages of a word line. This dimensional change distributes bit error rate variations across multiple pages, reducing the sensitivity to BER variations in any single page. The interleaved structure ensures that random errors are spread out, improving random read performance while maintaining error correction capability.
Data Source
AI summary
A storage system generates a low-density parity check (LDPC) code from a plurality of subcodes. The storage system stores each subcode in a different page of a word line in the memory. The subcode can be stored in one plane in the memory or across multiple planes. When the subcodes are stored across multiple planes, they can be stored in a checkboard pattern.