LDPC Parity-Check Matrix Segmentation for Lower-Complexity Decoding
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Solution Overview
Problem
Current LDPC code technologies face challenges in achieving high performance due to complex parity-check matrix design, especially in high-speed digital communication systems where noise, fading, and inter-symbol interference are prevalent, limiting their ability to maintain high data throughput and reliability.
Innovation Solution
The development of an LDPC encoding and decoding apparatus and method using a parity-check matrix with an information word sub-matrix and a parity sub-matrix, specifically structured with column blocks of 360 columns and defined by tables representing positions of value one, to improve encoding and decoding performance across various code rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a complex parity-check matrix design is used for LDPC codes, then error correction performance is improved, but implementation complexity increases
Solution Approach 1:
The parity-check matrix H is divided into sub-matrices H1 and H2, where H1 corresponds to information bits and H2 corresponds to parity bits. This segmentation allows independent optimization of each sub-matrix while maintaining overall code performance, reducing the complexity of designing and implementing the complete parity-check matrix.
Solution Approach 2:
The patent transforms the traditional two-dimensional parity-check matrix into a three-dimensional structure by introducing a time dimension through iterative decoding. The matrix operations are performed across multiple iterations, where each iteration refines the error correction capability, effectively adding a temporal dimension to the error correction process.
2Reliability
If iterative decoding with sum-product algorithm is applied to LDPC codes, then performance approaches Shannon's channel capacity, but computational complexity increases
Solution Approach 1:
The patent pre-calculates and stores the parity-check matrix structure and decoding parameters before actual communication. This preliminary preparation includes determining the optimal number of iterations and preprocessing the matrix relationships, which reduces the computational burden during real-time decoding operations.
Solution Approach 2:
The decoding process dynamically adjusts the number of iterations based on channel conditions and error patterns. The sum-product algorithm iteratively updates message probabilities, and the patent optimizes by stopping early when convergence is detected or when a predetermined error threshold is met, making the complexity adaptive rather than fixed.
3Productivity
If LDPC codes are used in high-speed digital communication systems, then data throughput increases, but susceptibility to noise and inter-symbol interference worsens
Solution Approach 1:
The iterative decoding process implements feedback by using decoded information from previous iterations to improve subsequent decoding attempts. The sum-product algorithm continuously refines probability estimates based on feedback from both the channel observations and previous decoding results, enabling the system to overcome noise and interference effects that would otherwise limit high-speed communication performance.
Data Source
AI summary
An encoding apparatus is provided. The encoding includes a low density parity check (LDPC) encoder which performs LDPC encoding on input bits based on a parity-check matrix to generate an LDPC codeword formed of 64,800 bits, in which the parity-check matrix includes an information word sub-matrix and a parity sub-matrix, the information word sub-matrix is formed of a group of a plurality of column blocks each including 360 columns, and the parity-check matrix and the information word sub-matrix are defined by various tables which represent positions of value one (1) present in every 360-th column.