LDPC Targeted Symbol Flipping With Precomputed LEH Address Lookup
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current targeted symbol flipping methods in LDPC codes suffer from long latency and complex mode switching due to the need for memory elements to request symbol addresses before each trial, resulting in inefficient hardware with a complicated state machine.
Innovation Solution
A method and apparatus utilizing a combination of LE queue and hard decision memory (LEH) to store all symbol addresses before run mode, allowing for the identification of suspicious checks and providing additional decoding trials, thereby simplifying targeted symbol flipping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If memory elements request symbol addresses before each trial in current targeted symbol flipping, then decoding can proceed, but latency increases and hardware complexity increases
Solution Approach 1:
The patent pre-calculates and stores all possible symbol addresses in the LEH memory structure before decoding begins. This preliminary action eliminates the need for memory elements to request addresses during each trial, thereby reducing latency while maintaining decoding correctness.
Solution Approach 2:
The LEH (Look-Up Table for Hard decisions) acts as an intermediary structure that stores pre-computed symbol addresses. Instead of direct requests between memory elements and address generation logic, the LEH table mediates by providing ready-made addresses, simplifying the hardware and reducing access time.
2Reliability
If memory elements request symbol addresses before each trial in current targeted symbol flipping, then decoding can proceed, but device complexity increases
Solution Approach 1:
The patent extracts the address generation function from the runtime decoding process and separates it into a static pre-computed table (LEH). This extraction removes the complexity of dynamic address generation logic from the critical decoding path, simplifying the hardware architecture.
Solution Approach 2:
By pre-computing and storing all symbol addresses in the LEH table before decoding, the patent eliminates the need for complex runtime address generation logic. This preliminary computation simplifies the hardware by replacing dynamic generation with static lookup.
3Adaptability or versatility
If targeted symbol flipping uses complicated mode switching, then decoding can adapt to different scenarios, but latency increases
Solution Approach 1:
The LEH table serves multiple functions: it stores symbol addresses for all possible scenarios, provides lookup for different trial conditions, and supports various decoding modes without requiring separate address generation logic. This multi-functionality maintains adaptability while eliminating mode switching overhead.
Data Source
AI summary
A LDPC decoder includes a processor for targeted symbol flipping of suspicious bits in a LDPC codeword with unsatisfied checks. All combinations of check indices and variable indices are compiled and correlated into a pool of targeted symbol flipping candidates and returned along with symbol indices to a process that uses such symbol indices to identify symbols to flip in order to break a trapping set.


