LDPC Transmitter Shortening Pattern for BER and FER Improvement
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Solution Overview
Problem
Current digital broadcasting systems face challenges in providing improved performance, particularly in terms of bit error rate (BER) and frame error rate (FER), due to limitations in signal transmission and reception methods.
Innovation Solution
A transmitter is designed with an outer encoder, zero padder, and LDPC encoder to encode input bits, pad zero bits based on a predetermined shortening pattern, and divide LDPC information bits into bit groups to improve BER and FER performance by positioning these bits specifically within the LDPC information bits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If zero bits are padded to LDPC information bits using a conventional sequential method, then the structure is simple, but the bit error rate (BER) and frame error rate (FER) performance deteriorates
Solution Approach 1:
The patent applies preliminary action by pre-defining a specific shortening pattern that identifies which bit groups should be padded with zero bits before the actual encoding process. The pattern is determined in advance based on the relationship between the number of outer-encoded bits and LDPC information bits, allowing the system to optimize BER and FER performance without adding complex real-time decision logic during transmission.
Solution Approach 2:
The patent implements local quality by selectively padding zero bits to specific bit groups (identified by indices in the shortening pattern) rather than uniformly padding all bit groups. This localized approach ensures that critical bit groups retain their original information while less critical positions receive zero padding, thereby improving overall error rate performance through targeted bit group treatment.
2Quantity of substance
If the number of zero bits to be padded is increased, then the shortening effect is improved, but the positioning precision of LDPC information bits deteriorates
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the shortening pattern based on the specific relationship between the number of outer-encoded bits and the required LDPC information bits. The pattern parameters (which bit groups receive padding) are changed according to the actual data volume, ensuring that zero bits are positioned optimally to maintain LDPC information bit precision while achieving the necessary shortening effect.
Solution Approach 2:
The patent implements dynamics by making the shortening pattern adaptive rather than fixed. The pattern is determined dynamically based on the actual number of outer-encoded bits available and the required LDPC information bit length, allowing the system to flexibly adjust which bit groups are padded with zero bits to maintain optimal positioning precision under varying data conditions.
Data Source
AI summary
A transmitter is provided. The transmitter includes: an outer encoder configured to encode input bits to generate outer-encoded bits including the input bits and parity bits; a zero padder configured to constitute Low Density Parity Check (LDPC) information bits including the outer-encoded bits and zero bits; and an LDPC encoder configured to encode the LDPC information bits, wherein the LDPC information bits are divided into a plurality of bit groups, and wherein the zero padder pads zero bits to at least some of the plurality of bit groups, each of which is formed of a same number of bits, to constitute the LDPC information bits based on a predetermined shortening pattern which provides that the some of the plurality of bit groups are not sequentially disposed in the LDPC information bits.