Lower-Triangular LDPC Matrix Encoding Without Degree-1 Nodes

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Solution Overview

Problem

Low-density parity-check (LDPC) codes with degree-1 variable nodes in their parity-check matrices result in poor error-floor performance and increased hardware requirements, making them unsuitable for applications requiring low error rates and high throughput.

Innovation Solution

The encoding parity-check matrix is generated in lower-triangular form, derived from a decoding parity-check matrix without degree-1 nodes, using matrix operations to ensure efficient recursive encoding and decoding processes, while avoiding the computational expense of dense matrices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If degree-1 variable nodes are included in the parity-check matrix, then encoding simplicity is maintained, but error-floor performance deteriorates

Engineering Contradiction:
Improveencoding simplicityVSAvoiderror-floor performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The parity-check matrix is segmented into two distinct components: a lower-triangular portion for efficient encoding and an upper-triangular portion optimized for decoding. This segmentation allows each part to be optimized for its specific function, resolving the contradiction between encoding simplicity and error-floor performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the parity-check matrix are assigned different structural properties. The lower-triangular region maintains simplicity for encoding, while the upper-triangular region is designed with specific properties to eliminate degree-1 variable nodes, improving error-floor performance without compromising encoding efficiency.

Inventive Principle:
Principle #3Local quality

2Reliability

If dense matrices are used to improve error-floor performance, then reliability improves, but computational expense increases

Engineering Contradiction:
Improveerror-floor performanceVSAvoidcomputational expense
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The matrix is divided into sparse lower-triangular and upper-triangular portions, allowing the system to avoid using dense matrices while still achieving improved error-floor performance through the optimized upper-triangular section.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The structural parameters of the parity-check matrix are changed by enforcing a lower-triangular form in the encoding portion and optimizing the upper-triangular portion for decoding, achieving better error-floor performance without the computational cost of dense matrices.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If quasi-cyclic LDPC codes are used for parallel decoding, then throughput increases, but hardware requirements increase

Engineering Contradiction:
ImprovethroughputVSAvoidhardware requirements
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The quasi-cyclic LDPC code structure is segmented with the lower-triangular portion handling encoding and the upper-triangular portion handling decoding. This segmentation maintains the parallel decoding capability for throughput while optimizing hardware usage through the structured sparsity of the triangular portions.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9667276B1Efficient low error-floor LDPC codes
Publication Date: 2017.05.30 XILINX INC
  • US9667276B1 patent drawing
  • US9667276B1 patent drawing
  • US9667276B1 patent drawing

AI summary

A system for providing data encoding includes: an encoder configured to encode message data with an encoding parity-check matrix having a parity part that is in lower-triangular form to generate an encoded message data, the encoded message data being for decoded by a decoder; wherein the encoding parity-check matrix is based on a decoding parity-check matrix that does not comprise any degree-1 node in a parity part of the decoding parity-check matrix; and wherein the system further comprises a non-transitory medium for storing the encoding parity-check matrix, wherein the non-transitory medium is a part of the encoder or is communicatively coupled to the encoder.