LDPC Windowed Decoding for Variable Optical Transfer Rates
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Solution Overview
Problem
Optical transmission systems face challenges in accommodating various client rates and transfer distances, as existing error correction technologies do not effectively handle different transfer rates and adjust correction capabilities accordingly.
Innovation Solution
An error correction decoding device that performs windowed decoding with variable window size and decoding iteration count, set by a control circuit, allowing flexible handling of various throughput granularities without changing the circuit configuration, and adjusts decoding performance based on transfer speed and distance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If spatially-coupled LDPC code with larger combined code length is used, then error correction performance is improved, but decoding circuit scale and delay increase
Solution Approach 1:
The spatially-coupled LDPC code is divided into multiple blocks, each processed by a separate decoding circuit. The received signal is segmented into blocks corresponding to different spatially-coupled LDPC codes, allowing parallel processing and reducing the complexity of individual decoding circuits while maintaining overall error correction performance.
Solution Approach 2:
Multiple decoding circuits are combined to process different blocks of the spatially-coupled LDPC code simultaneously. The results from individual decoding circuits are merged to produce the final decoded output, achieving high error correction performance through parallel processing without requiring a single large complex circuit.
2Reliability
If spatially-coupled LDPC code with larger combined code length is used, then error correction performance is improved, but decoding delay increases
Solution Approach 1:
The decoding process is segmented into multiple parallel operations on different blocks. By dividing the large spatially-coupled LDPC code into smaller blocks that can be decoded simultaneously, the overall decoding delay is reduced while maintaining the error correction benefits of the larger code structure.
Solution Approach 2:
Multiple decoding circuits operate continuously and simultaneously on different blocks of the received signal. This parallel continuous processing eliminates sequential bottlenecks, maintaining high error correction performance while significantly reducing the total decoding time compared to single-circuit sequential processing.
3Device complexity
If fixed circuit configuration is used, then device complexity is reduced, but adaptability to various transfer rates decreases
Solution Approach 1:
The decoding device is designed with multiple decoding circuits that can be selectively activated based on the transfer rate. Each decoding circuit corresponds to different block configurations, allowing the system to universally handle various transfer rates by enabling the appropriate subset of circuits without requiring physical reconfiguration.
Solution Approach 2:
The system dynamically selects and activates the appropriate number and configuration of decoding circuits based on the detected transfer rate. This dynamic adaptation allows the fixed physical circuit configuration to effectively support variable transfer rates by controlling which circuits are active during processing.
Data Source
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AI summary
Provided is an optical transmission/reception device including an error correction decoding unit (36) for decoding a received sequence encoded with an LDPC code, in which the error correction decoding unit (36) is configured to perform decoding processing using a parity check matrix (70) of a spatially-coupled LDPC code, which includes a plurality of parity check sub-matrices (71) combined with each other, in which the decoding processing is windowed decoding processing that uses a windou (80) over one or more parity check sub-matrices (71), and in which a window size of the window (80) and a decoding iteration count due to throughput and requested correction performance are variable and input from a control circuit (12) connected to the error correction decoding device (36).