LDPC Transmitter Zero Padding for BER and FER Improvement
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current digital broadcasting systems face challenges in providing improved performance and error rates due to inefficiencies in signal transmission and reception, particularly in handling varying code rates and lengths for LDPC encoding.
Innovation Solution
A transmitter is designed with an outer encoder, zero padder, and LDPC encoder to pad zero bits and map them based on a preset shortening pattern, ensuring the number of bits meets LDPC encoding requirements, thereby improving bit error rate (BER) and frame error rate (FER) performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If zero bits are padded to meet LDPC encoding requirements, then bit error rate and frame error rate performance is improved, but device complexity increases due to additional processing steps
Solution Approach 1:
The patent applies preliminary action by padding zero bits to the outer-encoded bits before LDPC encoding. The zero padder component adds the required number of zero bits in advance to ensure the bit sequence meets the predetermined length requirements for LDPC encoding, thereby improving BER and FER performance without requiring complex real-time adjustments during encoding
Solution Approach 2:
The patent introduces a zero padder as an intermediary component between the outer encoder and LDPC encoder. This mediator component handles the bit length adjustment by padding zero bits, separating the length adjustment function from the encoding process itself and simplifying the overall system architecture
2Reliability
If zero bits are padded to meet LDPC encoding requirements, then frame error rate performance is improved, but processing time increases
Solution Approach 1:
The zero padding is performed as a preliminary action before LDPC encoding, allowing the main encoding process to proceed efficiently without interruptions. The bit length requirement is satisfied in advance, preventing time loss during the encoding process itself
3Reliability
If outer encoding is performed before LDPC encoding, then error correction capability is improved, but device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the encoding process into two separate stages: outer encoding and LDPC encoding. Each encoding type handles specific error correction requirements, with the outer encoder providing initial error protection and the LDPC encoder providing additional redundancy. This segmentation allows each component to be optimized independently while achieving superior overall error correction capability
Solution Approach 2:
The patent combines two different encoding schemes (outer encoding and LDPC encoding) into a hybrid encoding system. By merging the error correction capabilities of both encoding types, the system achieves enhanced reliability and error correction performance that neither encoding scheme could provide alone
Data Source
AI summary
A transmitter is provided. The transmitter includes: an outer encoder configured to encode input bits to generate outer-encoded bits including the input bits and parity bits; a zero padder configured to generate a plurality of bit groups each of which is formed of a same number of bits, determine whether a number of the outer-encoded bits satisfies a predetermined number of bits required according to at least one of a code rate and a code length for Low Density Parity Check (LDPC) encoding, pads zero bits to some of the bits in the bit groups if the number of the outer-encoded bits is less than the predetermined number of bits, and maps the outer-encoded bits to remaining bits in the bit groups, based on a predetermined shortening pattern, thereby to constitute LDPC information bits; and an LDPC encoder configured to encode the LDPC information bits, wherein the some of the bits, in which zero bits are padded, are included in some of the bit groups which are not sequentially disposed in the LDPC information bits.