LDS Semiconductor Package With Exposed Die Backside Cooling
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Solution Overview
Problem
Conventional semiconductor devices with slug-up configurations face issues with die attach material as a bottleneck for heat dissipation, and grinding methods to expose the die backside lead to undesired cracking.
Innovation Solution
Employ laser direct structuring (LDS) technology to directly expose the die surface and eliminate the critical thermal interface, using a pre-molded leadframe with laser-drilled vias and plating to create a full plated package top surface for enhanced thermal dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If die attach material is used to attach the semiconductor chip to the heat slug, then the chip is securely mounted, but heat dissipation is blocked at the thermal interface
Solution Approach 1:
The patent removes the die attach material from the thermal path by exposing the die backside directly through laser drilling of the encapsulation. This extracts the harmful thermal interface layer while maintaining chip mounting through the leadframe structure, eliminating the bottleneck in heat dissipation.
Solution Approach 2:
The patent introduces a metallized layer within the encapsulation that serves as a thermal intermediary. This metallized layer provides a low-resistance thermal path from the die backside to the heat slug, replacing the function of die attach material while enabling superior heat dissipation.
2Loss of energy
If the encapsulation is ground to expose the die backside, then heat dissipation is improved, but the die develops cracks due to thinning
Solution Approach 1:
The patent replaces the mechanical grinding process with laser direct structuring. The laser drills through the encapsulation to expose the die backside without the mechanical contact and thinning that cause cracks, thereby maintaining die structural integrity while achieving excellent heat dissipation.
Solution Approach 2:
The patent changes the method parameter from mechanical removal (grinding) to optical/thermal removal (laser drilling). This parameter change allows precise control of the exposure depth and eliminates the mechanical stresses that lead to die cracking, while still exposing the die backside for thermal management.
3Loss of energy
If a slug-up configuration is used with heat extractor on top, then thermal dissipation is enhanced, but the package size increases
Solution Approach 1:
The patent embeds the thermal management functionality within the encapsulation structure itself. The metallized layer is integrated into the encapsulation, and the heat slug is positioned to contact the die backside through the encapsulation, creating a nested configuration that achieves high heat dissipation without increasing package footprint.
Solution Approach 2:
The patent transitions from a top-sided heat extraction approach to a bottom-sided approach by exposing the die backside. This dimensional change allows heat dissipation through the vertical path via the heat slug, enabling compact package designs with improved thermal performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Achieves high thermal dissipation without die cracking, resulting in improved device performance and reliability with a compact, small package outline.
Implementation Method 1
laser direct structuring (LDS) technology with the capability of achieving high thermal dissipation on top of the package as a result of directly exposing the die surface
Implementation Method 2
using a pre-molded leadframe with laser-drilled vias and plating to create a full plated package top surface for enhanced thermal dissipation
Data Source
AI summary
A semiconductor chip is arranged on a region of laser direct structuring (LDS) material of a laminar substrate. The semiconductor chip has a front active area facing towards, and a metallized back surface facing away from, the laminar substrate. An encapsulation of LDS material on the laminar substrate encapsulates the semiconductor chip with the metallized back surface of the semiconductor chip exposed at an outer surface of the encapsulation of LDS material. Electrically conductive lines and first vias are structured in the region of LDS material to electrically connect to the front active area of the semiconductor chip. A thermally conductive layer is plated over the outer surface of the encapsulation of LDS material in contact with the metallized back surface of the semiconductor chip. A heat extractor body of thermally conductive material is coupled in heat transfer relationship with the thermally conductive layer.