LDS Power QFN Package With Standard Clip Interconnect
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Solution Overview
Problem
Conventional solutions for power QFN circuits, such as wirebond interconnects and customized copper clips, face challenges in complexity, cost, and cleanliness, especially in multi-die or mixed package configurations, and require a more efficient and cost-effective method for handling high power levels.
Innovation Solution
A semiconductor device package using laser direct structuring (LDS) for molding and electroplating, allowing for standard clips to be soldered onto a custom paddle and leadframe, with a secondary molding step for sealing, enabling flexible substrate design and cost reduction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If customized copper clips are used for power QFN circuits, then thermal performance and power handling are improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent applies universality by using a single standardized clip design that can be used across multiple QFN package sizes and configurations. The clip serves multiple functions: electrical connection, thermal management, and mechanical support. This eliminates the need for customized clips for each device type, reducing manufacturing complexity while maintaining thermal performance.
Solution Approach 2:
The patent changes the parameters of the clip design by using standardized dimensions and materials that can be adjusted through electroplating thickness and paddle configuration rather than requiring completely different clip designs. This allows the same basic clip structure to adapt to different thermal and electrical requirements without increasing device complexity.
2Reliability
If customized clips are manufactured for each device type, then electrical connection quality is improved, but manufacturing cost increases
Solution Approach 1:
The patent employs a universal clip design that maintains reliable electrical connections across different QFN packages through standardized contact surfaces and electroplating. The paddle configuration and solder ball arrangement are optimized to work with various leadframe layouts without requiring custom clips, significantly reducing manufacturing cost while preserving connection quality.
Solution Approach 2:
The patent uses standardized clip templates and electroplating patterns that can be replicated across different device types. The same basic clip design is copied and adapted through minor parameter adjustments rather than creating entirely new customized clips, reducing tooling and manufacturing costs while maintaining electrical connection reliability.
3Reliability
If soft-solder process is used for attaching clips, then electrical connection is achieved, but additional cleaning steps are required
Solution Approach 1:
The patent extracts the cleaning requirement from the manufacturing process by using electroplated copper clips with controlled solderability. The electroplating process creates a surface that requires minimal cleaning intervention, separating the connection function from the cleaning function and eliminating the need for additional cleaning steps while maintaining reliable electrical connection.
4Adaptability or versatility
If multiple customized clips are used in mixed packages, then functional requirements are met, but assembly complexity increases
Solution Approach 1:
The patent applies universality by designing a single clip type that can be used in all positions and configurations within mixed packages. The standardized clip design with adjustable paddle configurations meets different functional requirements (power, ground, signal) without requiring multiple customized clip types, significantly reducing assembly complexity while maintaining versatility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach facilitates high power handling with reduced costs and improved thermal performance, while maintaining flexibility in substrate design and simplifying the assembly process by using standard clips and LDS technology.
Implementation Method 1
laser direct structuring (LDS) applied to sealing the components
Implementation Method 2
electroplating following LDS laser writing
Implementation Method 3
a standard clip (single size/shape) can be soldered to the top paddle and to the leadframe
Data Source
AI summary
A semiconductor chip is mounted on a leadframe. A first portion of an insulating package for the semiconductor chip is formed from laser direct structuring (LDS) material molded onto the semiconductor chip. A conductive formation (provided by laser-drilling the LDS material and plating) extends between the outer surface of the first portion of insulating package and the semiconductor chip. An electrically conductive clip is applied onto the outer surface of the first portion of the insulating package, with the electrically conductive clip electrically coupled to the conductive formation and the leadframe. A second portion of the insulating package is made from package molding material (epoxy compound) molded onto the electrically conductive clip and applied onto the outer surface of the first portion of the insulating package.