LDS Through-Mold Via Stacking for Dense QFN Interconnects
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Solution Overview
Problem
Existing metallization technologies using laser direct structuring (LDS) face challenges in forming deep vias that result in large vias due to aspect ratio constraints, limiting interconnection density and package miniaturization, and current solutions involving temporary ground connections are complex and inefficient.
Innovation Solution
Forming a continuous pattern of vias and traces in the LDS molding material, followed by electroplating and laser ablating sacrificial traces to isolate vias, allowing for stacked vias and maintaining a dense circuit layout.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If deep vias are formed to extend through several LDS molding compound levels, then interconnection between levels is achieved, but the via size becomes large due to aspect ratio constraints
Solution Approach 1:
The via structure is segmented into multiple shallow vias stacked vertically through different LDS molding compound levels, rather than forming a single deep via. Each via extends only through one level, maintaining acceptable aspect ratios while achieving interconnection through the stack of multiple vias and traces.
Solution Approach 2:
The solution transitions from a vertical dimension approach (single deep via) to a multi-level stacked approach distributing connections across multiple horizontal layers. This dimensional redistribution allows each via to remain small while collectively achieving the same interconnection function through the stack of vias and traces across different levels.
2Productivity
If isolated vias are formed to enable stacked via structure, then interconnection density increases, but the manufacturing process becomes complex requiring temporary ground connections and additional plating bath modifications
Solution Approach 1:
The patent forms a continuous pattern of vias and traces including sacrificial traces in advance before final isolation. This preliminary continuous structure enables straightforward electroplating without complex plating bath modifications, and the sacrificial traces are later removed to create the isolated via structure, simplifying the overall manufacturing process.
Solution Approach 2:
Sacrificial traces are introduced as intermediary elements that temporarily connect isolated vias to the continuous pattern during plating. These sacrificial traces facilitate the plating process by providing continuous conductivity, then are removed afterward to achieve the desired isolated via structure without requiring complex plating bath modifications.
3Reliability
If large vias are used to satisfy aspect ratio constraints, then plating process reliability is maintained, but package miniaturization is limited
Solution Approach 1:
The via structure is segmented into multiple shallow vias stacked vertically through different LDS molding compound levels, rather than forming a single deep via. Each via extends only through one level, maintaining acceptable aspect ratios while achieving interconnection through the stack of multiple vias and traces.
Solution Approach 2:
Multiple via structures are nested vertically across different LDS molding compound levels, with each via contained within its own level. This nesting arrangement allows each individual via to maintain a small size with good aspect ratio, while the collective nested structure achieves the required interconnection function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach avoids aspect ratio issues, enabling high-density, high-performance multi-row Quad Flat No-lead (QFN) packages with large conductive traces by facilitating a dense circuit layout and reducing package size.
Implementation Method 1
laser ablating sacrificial traces to electrically isolate the via from the continuous pattern
Implementation Method 2
plating this continuous pattern through electroplating
Data Source
AI summary
A semiconductor chip is arranged on a die pad in a substrate including first and second sets of electrically conductive leads. Electrically conductive formations couple the semiconductor chip to electrically conductive leads in the first set using through mold vias that extend towards the semiconductor chip and towards electrically conductive leads in the first set. The through mold vias are laser direct structured through a layer of laser direct structuring (LDS) encapsulation material just like a pattern of stages of through mold vias that extend towards the semiconductor chip and towards electrically conductive leads in the further set of electrically conductive leads. Further stages of through mold vias are laser direct structured through a further layer of LDS encapsulation material molded onto the layer of LDS encapsulation material having the vias and the stages of through mold vias laser direct structured therethrough.