LDSTQ Dynamic Capacity Management for Instruction Throughput

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Solution Overview

Problem

Conventional arithmetic processing devices face inefficiencies in instruction processing due to the low instruction packing factor in the Load and Store Queue (LDSTQ), leading to reduced use efficiency of the address generation unit and fixed-point arithmetic unit, as they struggle with out-of-order execution and resource conflicts, resulting in prolonged processing cycles and standby states for instructions.

Innovation Solution

An arithmetic processing device with a storage unit for load store instructions, an instruction management unit that determines the queued number of load store instructions, and a storage management unit that dynamically allocates and manages entries in the LDSTQ, allowing for provisional allocation and actual allocation of entries based on available space, thereby improving the instruction packing factor and reducing processing cycles.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the LDSTQ has a fixed upper limit on the number of load store instructions, then the queue structure is simple and manageable, but the instruction packing factor becomes low and processing cycles are prolonged

Engineering Contradiction:
Improveprocessing throughputVSAvoidprocessing cycles
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies dynamics by making the LDSTQ capacity flexible rather than fixed. The queue can dynamically expand beyond its initial upper limit when the instruction management unit determines that the queued number of load store instructions is less than the second number. This dynamic adjustment increases the instruction packing factor and reduces processing cycles without requiring a permanently larger queue structure.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements preliminary action by having the instruction management unit proactively determine whether to output load store instructions based on the queued number before the queue becomes full. By anticipating the need for additional storage capacity and preparing to expand the queue when conditions permit, the system avoids processing delays that would occur if the queue were strictly limited to its initial upper bound.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If load store instructions are strictly limited to the first number in LDSTQ, then resource management is simplified, but the use efficiency of address generation unit and fixed-point arithmetic unit decreases

Engineering Contradiction:
Improveuse efficiency of arithmetic unitsVSAvoidresource management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent makes resource management dynamic by allowing the LDSTQ to expand from the first number to the second number based on real-time conditions. The instruction management unit continuously monitors the queued number and adjusts the effective capacity accordingly, maximizing the utilization of address generation and fixed-point arithmetic units without requiring a permanently larger or more complex queue structure.

Inventive Principle:
Principle #15Dynamics

3Loss of time

If the queue releases entries only when full, then queue management is straightforward, but instructions enter standby state and processing is delayed

Engineering Contradiction:
Improveinstruction standby timeVSAvoidqueue management logic
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent implements feedback by having the instruction management unit continuously monitor the queued number of load store instructions and use this information to determine when to output instructions to the LDSTQ. This feedback mechanism ensures that the queue releases entries proactively when the queued number indicates sufficient capacity, preventing instruction standby states and reducing processing delays while maintaining manageable queue management logic.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10884738B2Arithmetic processing device and method of controlling arithmetic processing device
Publication Date: 2021.01.05 FUJITSU LTD
  • US10884738B2 patent drawing
  • US10884738B2 patent drawing
  • US10884738B2 patent drawing

AI summary

A Load and Store Queue (LDSTQ) stores load store instructions therein with an upper limit being a first number, and sequentially outputs the stored load store instructions to cause a data cache or a main memory to execute processing of data in accordance with the output load store instructions. A decode unit acquires load store instructions, and determines a queued number of load store instructions which have not been output from the LDSTQ among load store instructions output from the decode unit. When the queued number is smaller than a second number which is larger than the first number, the decode unit outputs the acquired load store instructions. An LDSTQ management unit acquires the output load store instructions. When the stored number of load store instructions stored in the LDSTQ is smaller than the first number, the LDSTQ management unit stores the acquired load store instructions in the LDSTQ.