Semiconductor Lead Bonding Layout for Uniform Sintering Pressure
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Solution Overview
Problem
Existing semiconductor devices face reliability degradation due to uneven pressure application during the formation of sintered bonding materials, particularly in bent beam leads, which can lead to inadequate bonding strength and potential chip breakage.
Innovation Solution
A semiconductor device configuration where a connecting member is offset and bonded to the obverse face electrode via a conductive bonding layer, ensuring uniform pressure application and preventing uneven force distribution, thus enhancing bonding strength and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the beam lead is pressed to form sintered bonding material, then bonding strength is improved, but uneven pressure application causes reliability degradation
Solution Approach 1:
The patent introduces a third dimension (height direction) to create a stepped pressing structure. The pressing member has different pressing surfaces at different heights, allowing simultaneous uniform pressing of both the bent beam lead and the semiconductor chip. This dimensional approach resolves the contradiction by enabling both strong bonding and reliable pressure distribution.
Solution Approach 2:
The pressing member is designed with different pressing surfaces tailored to different components: a first pressing surface for the beam lead and a second pressing surface for the semiconductor chip. Each surface is optimized for its specific component, allowing uniform pressure application locally to each part while maintaining overall bonding strength and reliability.
2Reliability
If the beam lead is bent to connect chip and circuit layer, then electrical connection is achieved, but manufacturing error causes shape variation making uniform pressing difficult
Solution Approach 1:
The pressing member has a first pressing surface specifically designed to accommodate the bent shape of the beam lead. This localized pressing surface compensates for manufacturing variations in the beam lead's bent shape, ensuring uniform pressure application despite shape inconsistencies, thereby maintaining both electrical connection reliability and press uniformity.
Solution Approach 2:
By introducing height variation in the pressing member's pressing surfaces, the patent creates a stepped structure that can simultaneously contact both the bent beam lead and the semiconductor chip at different vertical levels. This dimensional approach allows the pressing process to accommodate beam lead shape variations while maintaining uniform pressure distribution.
3Strength
If pressing force is concentrated on semiconductor chip, then bonding is achieved, but chip breakage occurs
Solution Approach 1:
The pressing member distributes pressing force to two separate locations: the beam lead and the semiconductor chip. By having both a first pressing surface for the beam lead and a second pressing surface for the chip, the system achieves bonding strength without concentrating excessive force on the chip alone, thereby preventing chip breakage while maintaining reliable bonding.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution prevents degradation in reliability by ensuring uniform pressure application and minimizing the risk of chip breakage, thereby improving the overall performance and longevity of the semiconductor device.
Implementation Method 1
a paste material, which is the base material of the sintered bonding material, is heated and used as the sintered bonding material. When the beam lead is pressed by a pressing member, the pressing force is also applied to the paste material. Heating the paste material under pressure as noted above urges the silver particles contained in the paste material to combine with one another, thereby improving the bonding strength.
Data Source
AI summary
A semiconductor device A1 includes a semiconductor element 10A having an element obverse face 101 and an element reverse face 102, the element obverse face 101 having an obverse face electrode 11 formed thereon and the element reverse face 102 having a reverse face electrode 12 formed thereon, a conductive substrate 22A including an obverse face 221A opposed to the element reverse face 102, and to which the reverse face electrode 12 is conductively bonded, a conductive substrate 22B including an obverse face 221B and spaced from the conductive substrate 22A in a width direction x, and a lead member 51 extending in the width direction x, and electrically connecting the obverse face electrode 11 and the conductive substrate 22B. The lead member 51 is located ahead of the obverse face 221B in the direction in which the obverse face 221B is oriented, and bonded to the obverse face electrode 11 via a lead bonding layer 32. The conductive substrate 22A, the semiconductor element 10A, and the lead bonding layer 32 overlap with the conductive substrate 22B, as viewed in the width direction x.