Lead Frame Package Layout for High-Voltage Die Isolation

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Solution Overview

Problem

There is a conflict between the desire to scale semiconductor packages to reduce cost and increase component density, and the need to ensure reliable assembly and operation, particularly in high voltage applications where electrical isolation is critical.

Innovation Solution

The semiconductor package design features a lead frame devoid of a die pad, with elongated leads that create gaps between them, allowing the semiconductor die to be mounted directly on these leads without overlapping with other leads, thus reducing package size while maintaining electrical isolation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a minimum separation distance is maintained between the edge of the semiconductor die and the edge of the die pad to ensure reliable assembly and electrical isolation, then assembly reliability is improved, but package size increases

Engineering Contradiction:
Improveassembly reliabilityVSAvoidpackage footprint
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The invention extracts and eliminates the die pad from the conventional semiconductor package structure. By removing this intermediate component, the semiconductor die can be mounted directly on the lead frame leads, eliminating the need for separation distance between the die and other package elements while maintaining electrical isolation through the gaps between leads

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The lead frame leads are configured with gaps between adjacent leads, creating discrete isolation zones. This segmentation of the lead frame structure provides electrical isolation between different die mounting areas without requiring a continuous die pad, enabling direct die-to-lead mounting with reduced footprint

Inventive Principle:
Principle #1Segmentation

2Area of stationary object

If the package size is reduced to increase component density and reduce cost, then manufacturing cost decreases, but electrical isolation between dies deteriorates

Engineering Contradiction:
Improvepackage footprintVSAvoidelectrical isolation
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

By removing the die pad, the invention eliminates the need for large isolation areas traditionally required around die mounting locations, enabling significant footprint reduction while maintaining isolation through the gap-configured leads

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The gaps between adjacent leads serve as intermediary isolation structures, providing electrical isolation between different die mounting areas without requiring additional space. These gaps act as natural isolation barriers that enable compact packaging while maintaining high voltage isolation requirements

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12211770B2Semiconductor package and lead frame with enhanced device isolation
Publication Date: 2025.01.28 INFINEON TECH AUSTRIA AG
  • US12211770B2 patent drawing
  • US12211770B2 patent drawing
  • US12211770B2 patent drawing

AI summary

A semiconductor package includes a first semiconductor die, a first group of leads that each comprise an interior end, and an encapsulant body of electrically insulating material that encapsulates the semiconductor die and the interior ends of the leads from the first group, wherein a gap is disposed between outer sidewalls of two immediately adjacent ones of the leads from the first group, wherein the first semiconductor die is mounted on the first group of leads such that a lower surface of the first semiconductor die faces and overlaps with each of the leads from the first group, and wherein the lower surface of the first semiconductor die extends across the gap between outer sidewalls of two immediately adjacent ones of the leads from the first group.