Semiconductor Lead Frame Annular Holes Crack Suppression
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Solution Overview
Problem
Semiconductor devices experience thermal stress due to heat generation and differences in linear expansion coefficients, leading to potential cracks at bonded portions, which can reduce device lifespan and reliability.
Innovation Solution
A semiconductor device design featuring a lead frame with annular holes around the electrode, filled with solder thicker than the bonding layer, which suppresses crack growth by distributing stress and ensuring a uniform life span.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If holes are simply aligned in a row in the lead frame, then the structure is simple, but crack growth is not suppressed when cracks occur at the end portion of the bonded portion
Solution Approach 1:
The lead frame is divided into multiple regions with different hole arrangements: a first region with holes aligned in a row, and a second region with holes arranged in a matrix pattern. This segmentation allows different hole configurations to address different stress distribution requirements in various areas of the bonded portion, effectively suppressing crack propagation while maintaining structural integrity.
Solution Approach 2:
Different hole arrangement patterns are applied to different regions of the lead frame based on local stress characteristics. The first region uses a simple row alignment suitable for its stress profile, while the second region employs a matrix pattern to better handle its specific stress distribution, optimizing crack suppression locally in each region.
2Reliability
If holes are located at the end portion of the bonded portion, then crack generation position is addressed, but solder becomes thickly formed and crack is likely to grow toward the element
Solution Approach 1:
The bonded portion is divided into a first region and a second region with different hole arrangements. By placing the matrix-patterned holes in the second region rather than directly at the end portion, the design segments the crack path and prevents direct crack propagation toward the element while avoiding excessive solder accumulation at critical locations.
Solution Approach 2:
The holes act as intermediary structures that redistribute stress and control solder flow. The matrix arrangement in the second region serves as an intermediate zone that manages stress distribution between the end portion and the element, preventing both excessive solder thickness and direct crack propagation toward the element.
3Quantity of substance
If solder is thickly formed at the end portion, then hole filling is achieved, but crack is likely to grow toward the element at that position
Solution Approach 1:
The solder distribution is optimized locally by using different hole arrangements in different regions. The matrix pattern in the second region controls solder formation to achieve appropriate thickness without excessive accumulation, ensuring reliable bonding while preventing crack propagation toward the element.
Solution Approach 2:
The solder filling process is segmented by region through different hole configurations. The first region's row-aligned holes and the second region's matrix holes create distinct solder distribution patterns, ensuring adequate solder quantity for bonding while preventing excessive solder that could promote crack growth toward the element.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively prevents crack propagation and ensures a uniform lifespan for semiconductor devices by managing thermal stress through strategic hole placement and solder distribution.
Implementation Method 1
thermal stress occurs due to a thermal cycle caused by heat generation of a semiconductor element and a difference in linear expansion coefficient between different kinds of members constituting the semiconductor device
Implementation Method 2
an electrode and a lead frame of a semiconductor element are connected by soldering
Data Source
AI summary
A semiconductor device includes a semiconductor element having an electrode, material of which is first metal, a lead frame through which a plurality of holes extend with an outer contour of the electrode being avoided in a first portion, and having the first portion, material of which is second metal, a bonding layer interposed between the first portion and the electrode, and solder being inside the plurality of holes and adjoining the bonding layer, the solder being thicker than the bonding layer. The plurality of holes have a plurality of first holes extending through the first portion in a thickness direction of the first portion. The bonding layer has a first bonding layer located on the electrode side and being an alloy of the first metal and tin, and a second bonding layer located on the first portion side and being an alloy of the second metal and tin. The plurality of first holes are located in an annular region inside the outer contour of the electrode.


