Lead Frame Semiconductor Package for Lower Impedance Heat Dissipation
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Solution Overview
Problem
As semiconductor feature sizes reduce, element impedance increases, leading to degraded device performance and reduced heat dissipation efficiency, which shortens the lifetime of semiconductor elements.
Innovation Solution
A semiconductor package design that includes a semiconductor chip with a drain surface and a source surface, connected to a drain lead frame assembly and a source lead frame assembly. The drain lead frame assembly has a drain contact plate with an area larger than the drain surface, and the source lead frame assembly has a source contact plate with an area smaller than the source surface, both integrally formed and encapsulated by an insulating layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If semiconductor feature size is reduced to improve integration density, then more components can be integrated into a given area, but element impedance increases and heat dissipation efficiency decreases
Solution Approach 1:
The patent extends the contact plates in the lateral direction (another dimension) beyond the chip boundaries. The drain contact plate area is larger than the drain surface area, and the source contact plate area is smaller than the source surface area, creating exposed contact plate regions that provide additional impedance reduction pathways without increasing vertical height.
Solution Approach 2:
The contact plates serve multiple functions: electrical connection, impedance reduction, and heat dissipation. The integrally formed lead frame assemblies combine mechanical support, electrical conduction, and thermal management functions into unified structures that address multiple problems simultaneously.
2Productivity
If semiconductor feature size is reduced to improve integration density, then more components can be integrated into a given area, but heat dissipation efficiency decreases
Solution Approach 1:
The contact plates extend laterally beyond the chip surfaces in the horizontal dimension, creating exposed contact plate areas that serve as additional heat dissipation surfaces. This lateral extension provides thermal pathways without increasing the vertical profile of the package.
Solution Approach 2:
The lead frame assemblies create extended thermal pathways that copy and extend the heat dissipation function beyond the chip boundaries. The integrally formed structures replicate the thermal conduction function across larger areas, effectively distributing heat over expanded surfaces.
3Reliability
If contact plate area is increased to reduce impedance and improve heat dissipation, then performance improves, but package complexity increases
Solution Approach 1:
The patent merges the contact plate, connecting section, and leads into integrally formed lead frame assemblies. This consolidation reduces the number of separate components and assembly steps while achieving the desired large contact plate areas for impedance reduction and heat dissipation.
Solution Approach 2:
The integrally formed lead frame assemblies perform multiple functions simultaneously: mechanical support, electrical connection, impedance reduction, and heat dissipation. This multi-functionality reduces overall package complexity by eliminating the need for separate components for each function.
Data Source
AI summary
This disclosure provides a semiconductor package including a chip, a drain lead frame assembly, a source lead frame assembly, and an insulation layer. The chip includes an opposite drain surface and source surface. The drain lead frame assembly includes a drain contact plate, a drain connecting section, and drain leads integrally formed into one piece. The drain contact plate is physically connected to the drain surface. An area of the drain contact plate is larger than that of the drain surface. The source lead frame assembly includes a source contact plate, a source connecting section, and source leads integrally formed into one piece. The source contact plate is physically connected to the source surface. An area of the source contact plate is smaller than that of the source surface. The insulation layer encapsulates the chip and surrounds the drain contact plate and the source contact plate.