Lead Frame Packaging for Package-on-Package Stacking
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Solution Overview
Problem
Existing semiconductor die packaging methods using lead frames are unable to facilitate package-on-package (POP) stacking configurations, as they only provide electrical connections to one side of the packaged die, limiting the ability to connect multiple packaged dies in a stacked manner.
Innovation Solution
A method involving a first substrate with a planar surface, where integrated circuit dies are placed with conductive adhesive and preformed lead frames having central recessed portions, allowing for electrical connections between bonding pads and leads, enabling the formation of package terminals and allowing for POP configurations by exposing the bottom sides of the leads and recessed portions for connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional lead frame packaging method is used, then the packaging process is simple and well-established, but the device cannot be stacked in POP configuration because electrical connections are only provided to one side
Solution Approach 1:
The patent transitions from traditional single-sided electrical connection to dual-sided electrical connection by adding vertical dimension connectivity. The lead frame structure is modified to provide electrical pathways through the package, enabling connections to both top and bottom surfaces, which allows POP stacking in the vertical dimension.
Solution Approach 2:
The lead frame is segmented into multiple functional regions: a first region for top surface connections, a second region for bottom surface connections, and intermediate connection structures. This segmentation allows independent optimization of each connection region and enables the complex dual-sided connectivity required for POP stacking.
2Adaptability or versatility
If dual-sided electrical connections are added to enable POP stacking, then POP stacking capability is achieved, but the packaging process and structure become more complex
Solution Approach 1:
The lead frame is pre-formed with the complex dual-sided connection structure before die attachment. The intricate lead frame geometry including intermediate connection elements and multiple connection regions is manufactured in advance, allowing the assembly process to simply involve placing the pre-configured lead frame onto the die without complex real-time manipulation.
3Adaptability or versatility
If multiple connection regions are created in the lead frame, then electrical connections to both sides are enabled, but the lead frame design and fabrication become more difficult
Solution Approach 1:
The lead frame is designed as a universal platform that integrates multiple functions: mechanical support for the die, electrical connection pathways to both surfaces, structural framework for the package, and alignment features. This multi-functional design consolidates what would otherwise require multiple separate components into a single integrated structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the creation of packaged integrated circuit dies that can be stacked and electrically connected in a POP configuration, allowing for the integration of passive elements like inductors and capacitors, and providing a compact packaging solution with electrical connections from both sides of the die.
Implementation Method 1
A conductive adhesive is applied to the bottom surface of each of the dies
Implementation Method 2
A wire bonding machine bonds certain of the bonding pads of the die 22 to the top side of certain of the leads 12
Data Source
Figure 1~2f
Figure 3~6
Figure 7~10
AI summary
A packaged semiconductor die has a preformed lead frame with a central recessed portion, and a plurality of conductive leads. An integrated circuit die has a top surface and a bottom surface opposite thereto, with the top surface having a plurality of bonding pads for electrical connection to the die. The die is positioned in the central recessed portion with the top surface having the bonding pads facing upward, and the bottom surface in contact with the recessed portion. Each of the leads has a top portion and a bottom portion. The leads are spaced apart and insulated from the central recessed portion. A conductive layer is deposited on the top surface of the die and the top portion of the leads and is patterned to electrically connect certain of the bonding pads of the die to certain of the conductive leads. An insulator covers the conductive layer. The present invention also relates to a method of packaging such an integrated circuit die.