Lead Frame Electrical Testing for Semiconductor Yield

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Solution Overview

Problem

In the semiconductor industry, the electrical properties of lead frames can vary, leading to unpredictable yield rates in subsequent processes when dies are arbitrarily bonded to them, as the electrical testing of lead frames is not standardized.

Innovation Solution

A testing method that grades lead frames based on their electrical properties by isolating specific pins, bonding controllers to the lead frames, and performing electrical testing to evaluate and select suitable lead frames for chip integration, thereby improving process yield rates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If lead frames are arbitrarily bonded without electrical testing, then the manufacturing process is simple and fast, but the yield rate of subsequent processes is affected

Engineering Contradiction:
Improvemanufacturing speedVSAvoidyield rate
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent performs electrical testing on lead frames before bonding dies to them. This preliminary action identifies lead frames with abnormal electrical properties (such as open circuits or short circuits) in advance, allowing them to be sorted out before the bonding process. This prevents subsequent process failures and improves yield rate without significantly impacting manufacturing productivity.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If electrical testing is performed on lead frames, then the yield rate of subsequent processes is improved, but the testing complexity and time increase

Engineering Contradiction:
Improveyield rateVSAvoidtesting complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the lead frame into multiple lead frame units, each with specific pins (first pins connected to frame body, second pins connected together). This segmentation allows for targeted electrical testing of specific pin configurations and connections. By testing individual units and their specific electrical pathways rather than the entire lead frame as one complex system, the testing process becomes more manageable and less complex.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different testing approaches to different parts of the lead frame based on their specific functions. First pins are tested for connection to the frame body, while second pins are tested for interconnections. This localized testing approach focuses resources on critical electrical pathways, reducing overall testing complexity while maintaining high reliability.

Inventive Principle:
Principle #3Local quality

3Measurement precision

If all lead frames are tested individually, then the electrical properties are accurately evaluated, but the testing time and productivity are reduced

Engineering Contradiction:
Improveelectrical property evaluation accuracyVSAvoidtesting speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent performs electrical testing on lead frames at a selective stage in the manufacturing process, specifically after controllers are bonded but before die bonding. This partial testing approach focuses on testing only the lead frame units that will carry controllers, rather than testing every single lead frame unit. This reduces overall testing time and maintains productivity while still achieving accurate electrical property evaluation for the critical components.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS10031179B2Testing method
Publication Date: 2018.07.24 NORTHERN EURO LIGHTING CO LTD
  • US10031179B2 patent drawing
  • US10031179B2 patent drawing
  • US10031179B2 patent drawing

AI summary

A testing method including the following steps is provided. A lead frame is provided, wherein the lead frame includes a frame body and a plurality of lead frame units which are connected with each other through the frame body and are arranged in array. Each of the lead frame units includes at least one first pin connected with the frame body and a plurality of second pins which are connected with each other. A plurality of controllers are bonded with the lead frame units and each of the controllers is electrically connected with the corresponding lead frame unit. The frame body of each of the lead frame units is electrically isolated from the second pins. A first electrical testing is performed to each of the lead frame units carrying the controllers.