Semiconductor Package Lead Protrusion Layout for Smaller Reliable Packaging
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Solution Overview
Problem
Conventional semiconductor packages face issues of excess cost, decreased reliability, and large package sizes, leading to suboptimal performance.
Innovation Solution
The development of a semiconductor device with a substrate featuring a lead via and a lead protrusion, where the lead protrusion protrudes from the substrate encapsulant at one side, allowing for improved electrical coupling and reduced package size through the use of a redistribution structure for signal routing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If conventional semiconductor packages are used, then manufacturing is simpler, but package size is too large and performance is low
Solution Approach 1:
The patent transitions from conventional two-dimensional planar packaging to a three-dimensional vertical architecture by stacking multiple semiconductor dies vertically and routing signals through vertical vias and interconnect structures. This dimensional change enables significant reduction in package footprint while maintaining or increasing functional capacity
Solution Approach 2:
The patent implements nested structures where multiple semiconductor dies are stacked within a single package substrate, with each die containing multiple layers of conductive interconnects and insulation. The leadframe structure is nested within the package substrate, creating a compact hierarchical arrangement that reduces overall package size
2Reliability
If conventional semiconductor packages are used, then manufacturing cost is lower, but reliability is decreased
Solution Approach 1:
The patent performs preliminary actions by pre-forming conductive vias and interconnect structures within the package substrate before die attachment. The leadframe is pre-shaped and pre-positioned, and insulation layers are pre-deposited, which simplifies subsequent assembly steps and reduces manufacturing variability, thereby improving reliability
Solution Approach 2:
The patent merges multiple functions into integrated structures: the package substrate simultaneously provides mechanical support, electrical interconnection, and signal routing. The leadframe is merged with the substrate to form a unified interconnect system, reducing the number of discrete components and potential failure points
3Productivity
If conventional semiconductor packages are used, then manufacturing is easier, but performance is decreased
Solution Approach 1:
The patent achieves improved performance by transitioning to three-dimensional vertical stacking, which reduces signal path lengths and parasitic inductances. The vertical via structures enable faster signal transmission compared to conventional planar routing, directly enhancing device productivity and performance
Solution Approach 2:
The patent applies local quality by creating region-specific interconnect structures with optimized conductivity and geometry. Different areas of the package substrate have tailored conductive patterns and via densities matched to local functional requirements, enabling high-performance signal routing where needed while maintaining manufacturability
Data Source
AI summary
An electronic device includes a substrate with a conductive structure and a substrate encapsulant. The conductive structure has a lead with a lead via and a lead protrusion. The lead via can include via lateral sides defined by first concave portions and the lead protrusion can include protrusion lateral sides defined by second concave portions. The substrate encapsulant covers the first concave portions at a first side of the substrate but not the second concave portions so that the lead protrusion protrudes from the substrate encapsulant at a second side of the substrate. An electronic component can be adjacent to the first side of the substrate and electrically coupled to the conductive structure. A body encapsulant encapsulates portions of the electronic component and the substrate. The lead can further include a lead trace at the second side of the substrate.