Semiconductor Lead Recess Structure for Delamination Resistance

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Solution Overview

Problem

Existing semiconductor devices face challenges in preventing delamination at the interface between leads and sealing materials due to limitations in forming recesses and barbed portions using press working, which affects the bonding between the lead, electrode, and sealing material.

Innovation Solution

A semiconductor module design featuring a lead with a roughening recess on its upper surface, comprising a main recess and sub-recesses with barbed portions on the walls, which enhances adhesion by increasing the interface area and preventing delamination, achieved through specific punch tooling and recess formation techniques.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If press working is used to form recesses and barbed portions on the lead surface, then the bonding area between lead and sealing material is increased, but the manufacturing precision and dimensional accuracy deteriorate due to working limitations

Engineering Contradiction:
Improvebonding reliabilityVSAvoiddimensional accuracy
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The lead surface is roughened by press working before the sealing material is applied, creating recesses and barbed portions in advance. This preliminary action increases the bonding area and mechanical interlocking capability, ensuring reliable adhesion between the lead and sealing material while accounting for the inherent limitations of press working precision

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Instead of uniformly treating the entire lead surface, the invention creates localized recesses and barbed portions at specific locations where bonding is critical. This local quality approach concentrates the roughening effect in areas that most need enhanced adhesion, optimizing the balance between bonding reliability and manufacturing precision

Inventive Principle:
Principle #3Local quality

2Reliability

If the lead surface is roughened to prevent delamination, then the adhesion between lead and sealing material is enhanced, but the manufacturing complexity increases due to additional processing steps

Engineering Contradiction:
Improvedelamination resistanceVSAvoidprocessing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The formation of multiple recesses and barbed portions is achieved by integrating them into a single press working operation rather than performing separate processing steps for each feature. This merging of operations reduces manufacturing complexity while still achieving the desired surface roughening effect for delamination prevention

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The press working tool is designed to perform multiple functions simultaneously: creating recesses, forming barbed portions, and roughening the surface all in one operation. This multi-functionality approach enhances adhesion while minimizing the increase in processing complexity by consolidating multiple features into a single manufacturing step

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250022833A1Semiconductor module, semiconductor device, and vehicle
Publication Date: 2025.01.16 FUJI ELECTRIC CO LTD
  • US20250022833A1 patent drawing
  • US20250022833A1 patent drawing
  • US20250022833A1 patent drawing

AI summary

A semiconductor module, including: a circuit board including a semiconductor element; a lead bonded to an electrode of the semiconductor element by a bonding material; and a sealing material sealing the semiconductor element and the lead. The lead includes: a bonding portion bonded to the electrode, and a roughening recess formed on an upper surface of the bonding portion. The roughening recess includes: a main recess having a first wall surfaces and a second wall surface opposite to each other, and a barbed portion formed on the first wall surface and protruding toward the second wall surface, and a sub-recess having: a center, which is located, in a plan view of the semiconductor module, outside the main recess and at a position away from the first wall surface by a predetermined distance, and an inclined surface that becomes shallower from the center toward an opening end of the main recess.