Leadframe Openings for Lower Current Density Bump Interfaces

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Solution Overview

Problem

The challenge in semiconductor packaging is the increase in power and current densities at the junction between interconnect bumps and leadframes, leading to higher temperatures and premature failures due to electromigration, as well as reduced surface area for bump connections, which limits the number of interconnects and increases thermal inefficiencies.

Innovation Solution

The solution involves forming a leadframe with non-linear openings and varying widths to increase the surface area for bump connections, using a combination of cutting and etching techniques to create a leadframe with smaller first openings and wider second openings, allowing for larger bumps and more connections, thereby reducing current and power densities and enhancing thermal efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If conventional leadframes with uniform openings are used, then manufacturing is simpler, but the surface area for bump connections is reduced and current densities increase

Engineering Contradiction:
Improvesurface area for bump connectionsVSAvoidelectromigration resistance
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The leadframe transitions from uniform openings to non-uniform openings with varying widths. The openings are designed with wider sections at the bump connection areas and narrower sections elsewhere, creating local variations in geometry that increase the surface area available for bump connections while maintaining overall structural integrity and reducing current density concentrations.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The invention introduces non-linear paths for the openings instead of simple straight lines. These curved or serpentine openings increase the effective surface area within the same footprint, providing more connection area for bumps without increasing the overall leadframe size, thereby addressing both the area requirement and current density reduction goals.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If larger bump connection area is achieved, then current densities decrease, but the leadframe complexity increases

Engineering Contradiction:
Improveelectromigration resistanceVSAvoidleadframe structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The complexity is localized only to the opening patterns where it is most needed - at the bump connection areas. The rest of the leadframe maintains a simpler, more uniform structure. This selective application of geometric complexity achieves the reliability improvement without unnecessarily complicating the entire leadframe design or manufacturing process.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach decreases thermal inefficiencies and increases the lifespan of the solder-bump interface by reducing current densities and allowing for more efficient power transfer, while also accommodating smaller semiconductor dies with increased functionality.

Implementation Method 1

cutting a first side of a metal strip to a depth D1 according to a cutting pattern to form a first plurality of openings extending on the first side

Methodology Applied
Scientific EffectCutting:

Implementation Method 2

etching the second side of the metal strip to a depth D2 according to a photoresist pattern to form a second plurality of openings extending on the second side

Methodology Applied
Scientific EffectEtching:

Implementation Method 3

applying a photoresist on the second side of the metal strip, applying a chemical etch to the second side of the metal strip according to a photoresist pattern

Methodology Applied
Scientific EffectPhotoresist: Photography

Data Source

PatentUS12183703B2Leadframes in semiconductor devices
Publication Date: 2024.12.31 TEXAS INSTRUMENTS INC
  • US12183703B2 patent drawing
  • US12183703B2 patent drawing
  • US12183703B2 patent drawing

AI summary

In one instance, a method of forming a semiconductor package with a leadframe includes cutting, such as with a laser, a first side of a metal strip to a depth D1 according to a cutting pattern to form a first plurality of openings, which may be curvilinear. The method further includes etching the second side of the metal strip to a depth D2 according to a photoresist pattern to form a second plurality of openings. At least some of the first plurality of openings are in fluid communication with at least some of the second plurality of openings to form a plurality of leadframe leads. The depth D1 is shallower than a height H of the metal strip, and the depth D2 is also shallower than the height H. Other embodiments are presented.