Leadframe Etching for Mold Compound Interlock

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Solution Overview

Problem

Leadframes in packaged semiconductor devices with NiPdAu or other finishes have low adhesion to the mold compound, leading to separation issues during cutting and temperature excursions, resulting in bond wire breakage and device wastage.

Innovation Solution

Exposing predetermined surface areas of the leadframe to an etching process to create etched recesses with undercut step walls, which are embedded in the molding compound, enhancing mechanical grip and interlock between the leadframe and mold compound.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the leadframe is pre-plated using NiPdAu or other finishes, then the electrical conductivity and corrosion resistance are improved, but the adhesion to the mold compound deteriorates

Engineering Contradiction:
Improveelectrical conductivity and corrosion resistanceVSAvoidadhesion to mold compound
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The leadframe surface is segmented into multiple recesses that penetrate through the plating layer, creating distinct anchoring zones. These recesses divide the contact interface between leadframe and mold compound into multiple localized regions, each providing mechanical interlocking while maintaining the overall electrical conductivity through the plating structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The solution transitions from a two-dimensional surface contact to a three-dimensional mechanical interlock by forming recesses that extend into the leadframe thickness. The mold compound flows into these recesses and cures, creating anchor points that engage the plating layer from multiple depths, thereby significantly improving adhesion strength.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If the leadframe and mold compound are encapsulated without enhanced interlocking, then the manufacturing process is simple, but the mechanical strength during cutting and temperature excursions deteriorates

Engineering Contradiction:
Improveencapsulation process simplicityVSAvoidmechanical strength during cutting and temperature excursions
Core Design Contradiction:
Ease of manufactureVSStrength

Solution Approach 1:

The recesses are formed in the leadframe before the encapsulation process, pre-preparing the structural features needed for mechanical interlocking. This preliminary action integrates seamlessly into the existing manufacturing flow, requiring only an additional etching step before mold compound application, while delivering significant improvements in mechanical strength during subsequent cutting and temperature cycling operations.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The improved mechanical interlock reduces bond wire breakage and wastage by securely bonding the leadframe to the mold compound, ensuring the integrity of the semiconductor devices during separation and temperature variations.

Implementation Method 1

at least one predetermined surface area of the leadframe is exposed to an etching process that produces an etched recess

Methodology Applied
Scientific EffectEtching:

Implementation Method 2

Both the recessed wall and the step wall are contacted by and embedded in the molding compound during the molding step. This means that there is an improved mechanical grip between the leadframe and the mold compound in which it is encapsulated and they are bonded together more securely.

Methodology Applied
Scientific EffectMechanical interlock:

Data Source

PatentUS7741704B2Leadframe and mold compound interlock in packaged semiconductor device
Publication Date: 2010.06.22 TEXAS INSTRUMENTS INC
  • US7741704B2 patent drawing
  • US7741704B2 patent drawing
  • US7741704B2 patent drawing

AI summary

An interference interlock between leadframe features and a mold compound is provided in a packaged semiconductor device by exposing at least one predetermined surface area to an etching process prior to a molding step. This produces an etched recess with a recessed wall delimited by a step wall, generally perpendicular and adjacent to the recessed wall. The step wall is partially undercut by etching. During the molding step, the recessed wall and the step wall are both contacted by and embedded in the molding compound.