Leadframe Package Interposer Layout for Lower Pin Count

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Solution Overview

Problem

Leadframe packages require multiple bond wires for bonding with multiple pins of the same function, increasing package cost and customer PCB area, which is undesirable for miniaturized electronic devices.

Innovation Solution

Incorporating a metal interposer between the die pad and semiconductor die, with bond wires connected to the interposer to reduce pin count and enable a pyramidal stack structure, and optionally using a multi-piece interposer for different function signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple pins are used for bonding with same function signals, then electrical functionality is ensured, but package size and cost increase

Engineering Contradiction:
Improveelectrical functionalityVSAvoidpackage size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

Multiple pins with the same function are merged into a single pin that connects to a pad on the interposer. The interposer consolidates multiple electrical connections into fewer external pins, reducing package size while maintaining all necessary electrical functionalities through internal redistribution of signals.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

An interposer is introduced as an intermediary component between the semiconductor die and the leadframe. This interposer contains multiple pads that receive bond wires from the die, then redistributes these connections through fewer external pins, acting as a mediator that reduces the number of external connections required.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If multiple bond wires are used for same function bonding, then electrical connectivity is achieved, but material cost increases

Engineering Contradiction:
Improveelectrical connectivityVSAvoidmaterial cost
Core Design Contradiction:
ReliabilityVSLoss of substance

Solution Approach 1:

Multiple bond wires that would traditionally connect to separate pins are merged into connections that terminate on pads of the interposer. The interposer consolidates these wire connections internally, reducing the total number of bond wires required and thereby reducing material costs.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The interposer serves as an intermediary that accepts multiple bond wire connections on its top surface and redistributes them through fewer external pin connections. This mediation reduces the total quantity of bond wire material needed while preserving all electrical connectivity requirements.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Area of stationary object

If pin count is reduced, then package size decreases, but electrical functionality may be compromised

Engineering Contradiction:
Improvepackage sizeVSAvoidelectrical functionality
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The electrical connections are moved from a two-dimensional layout (multiple pins around the perimeter) to a three-dimensional stacked architecture. The interposer enables vertical stacking of connections, allowing multiple electrical pathways to coexist in the vertical dimension rather than competing for horizontal space, thus reducing pin count while maintaining functionality.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The interposer is divided into multiple pads, each handling specific electrical connections. This segmentation of the interposer into functional zones allows efficient routing and redistribution of signals, enabling reduced pin count while maintaining all necessary electrical functionalities through organized internal connections.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20260076235A1Leadframe package with metal interposer
Publication Date: 2026.03.12 MEDIATEK INC
  • US20260076235A1 patent drawing
  • US20260076235A1 patent drawing
  • US20260076235A1 patent drawing

AI summary

A semiconductor package includes a leadframe having a die pad and a plurality of pins disposed around the die pad, a metal interposer attached to a top surface of the die pad, and a semiconductor die attached to a top surface of the metal interposer. A plurality of bond wires with same function is bonded to the metal interposer. The die pad, the metal interposer and the semiconductor die are stacked in layers so as to form a pyramidal stack structure.