Multilayer Leadframe Power Module for High-Density 3D Routing

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Solution Overview

Problem

Existing power electronics modules face challenges in achieving high power density due to limitations in power and control routing on printed circuit boards, which reduces thermal efficiency and overall performance.

Innovation Solution

A multilayered leadframe system is introduced, comprising separate subframes for power and control routing, eliminating the need for routing on the DBC printed circuit board, and utilizing a DBC printed circuit board with power semiconductors connected via these subframes, encapsulated in a mold compound for insulation and stabilization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If power and control routing is performed on the DBC printed circuit board, then electrical connections can be established, but power density is reduced due to routing space requirements

Engineering Contradiction:
Improvepower densityVSAvoidrouting complexity
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The patent transitions from planar routing on the DBC board to three-dimensional routing using a multilayered leadframe structure. The leadframe extends in multiple spatial dimensions with layers arranged vertically, allowing power and control signals to be routed in 3D space rather than constrained to the 2D board surface. This dimensional change enables higher power density by eliminating the need for extensive planar routing while maintaining all necessary electrical connections.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent introduces a multilayered leadframe as an intermediary component between the power semiconductors and the external connections. This leadframe acts as a mediator that provides both mechanical support and electrical routing functions, separating the routing function from the DBC board itself. The leadframe's multiple layers serve as intermediate routing paths that reduce the burden on the DBC board and enable higher power density.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Power

If a multilayered leadframe with separate subframes is used for three-dimensional routing, then power density increases, but manufacturing complexity increases

Engineering Contradiction:
Improvepower densityVSAvoidassembly difficulty
Core Design Contradiction:
PowerVSEase of manufacture

Solution Approach 1:

The multilayered leadframe is divided into separate subframes, each responsible for specific routing functions (power routing, control routing, ground planes). This segmentation allows each subframe to be manufactured and prepared independently, then assembled together. The separation simplifies the manufacturing process by breaking down the complex multilayered structure into manageable components that can be produced using standard fabrication techniques and then combined.

Inventive Principle:
Principle #1Segmentation

3Loss of energy

If routing is eliminated on the DBC printed circuit board, then thermal efficiency improves, but electrical connection complexity increases

Engineering Contradiction:
Improvethermal efficiencyVSAvoidconnection structure
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent merges the routing function with the leadframe structure itself. The leadframe's multiple layers are designed to provide both mechanical support and electrical routing pathways. By combining these functions into a single integrated component, the design eliminates the need for separate routing traces on the DBC board, thereby improving thermal efficiency while managing connection complexity through the leadframe's inherent structural design.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12564113B2Power electronics module
Publication Date: 2026.02.24 ZF FRIEDRICHSHAFEN AG
  • US12564113B2 patent drawing
  • US12564113B2 patent drawing

AI summary

A power electronics module, having a DBC PCB having power semiconductors arranged thereon, and a multilayered leadframe including at least two separate subframes. No power or control routing takes place on the PCB. A region of the load source subregion is arranged between the PCB and the gate source and kelvin source subregion and is in electrical contact with the power semiconductors, and an adjoining region is located outside the PCB. A region of the drain source subregion is in electrical contact with a drain terminal on the PCB, and an adjoining region is located outside the PCB. The gate source subregion and the kelvin source subregion have a region above the load source subregion at which said subregions are in electrical contact with the power semiconductors and have an adjoining region outside the PCB which is opposite the drain source subregion and has pins bent above the PCB.