Leadframe Package Structure for Higher Routing and Low Inductance

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Solution Overview

Problem

Existing semiconductor packaging techniques face challenges in achieving high routing capability, variability in footprint design, good board-level reliability, and low assembly cost, particularly in power applications where low package inductance and spreading resistance are required.

Innovation Solution

The semiconductor chip package incorporates a first leadframe to form a footprint, a structured metal plate between the leadframe and the chip, and a pattern of bond material to electrically and mechanically connect the leadframe to the metal plate, all embedded in a mold compound.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If laminate-based package solutions are used to improve footprint design flexibility and routing capability, then the footprint design variability is improved, but the package cost increases and low package resistances are difficult to obtain

Engineering Contradiction:

Improvefootprint design variabilityVSAvoidpackage cost

Core Design Contradiction:

Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent changes the material parameter from laminate to leadframe structure, and adjusts the metal thickness parameter to achieve both cost reduction and low package resistance. The leadframe approach with optimized metal thickness provides both economic and electrical performance benefits.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent uses composite material structures by combining leadframe with molded compound, creating a hybrid package structure that achieves both cost-effectiveness and low resistance performance, avoiding the limitations of pure laminate solutions.

Inventive Principle:

Principle #40Composite materials

2Adaptability or versatility

If laminate-based package solutions are used to improve footprint design flexibility, then the routing capability is improved, but low package resistances are difficult to obtain due to relatively low metal thickness

Engineering Contradiction:

Improverouting capabilityVSAvoidpackage resistance

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

The patent optimizes the metal thickness parameter in the leadframe structure to achieve low package resistance while maintaining routing flexibility. By carefully controlling the metal layer thickness and geometry, both electrical performance and design adaptability are improved.

Inventive Principle:

Principle #35Parameter changes

3Ease of manufacture

If conventional packaging techniques are used to reduce assembly cost, then the assembly cost is reduced, but low package inductance and low spreading resistance are not achieved

Engineering Contradiction:

Improveassembly costVSAvoidpackage inductance and spreading resistance

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The patent transitions from planar routing to three-dimensional leadframe structures, allowing current paths to be optimized in multiple dimensions. This reduces inductance and spreading resistance while maintaining cost-effective assembly processes through standardized leadframe manufacturing.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent optimizes geometric parameters of the leadframe structures, including trace width, trace length, and grounding patterns, to minimize inductance and spreading resistance while keeping the package cost-effective through efficient material usage and manufacturing.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enhances routing capability, allows for flexible footprint design, improves board-level reliability, and reduces assembly costs, while also achieving low package inductance and spreading resistance, particularly beneficial for power applications.

Implementation Method 1

A pattern of bond material is disposed between the first leadframe and the structured metal plate, wherein the pattern of bond material is configured to electrically and mechanically connect structures of the first leadframe to structures of the structured metal plate

Methodology Applied

Scientific EffectConduction (electrical): Conduction (electrical)

Implementation Method 2

Methodology Applied

Scientific EffectAdhesion: Adhesive

Data Source

PatentEP4553892A1Leadframe package with increased routing capability

Publication Date: 2025.05.14 INFINEON TECH AUSTRIA AG

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AI summary

A semiconductor chip package includes a semiconductor chip having a first side and a second side opposite the first side. The first side includes chip pads. The semiconductor chip package includes a first leadframe structured to form a footprint of the semiconductor chip package. The semiconductor chip package further includes a structured metal plate disposed between the first leadframe and the semiconductor chip, wherein the first side of the semiconductor chip faces the structured metal plate. A pattern of bond material is disposed between the first leadframe and the structured metal plate. The pattern of bond material is configured to electrically and mechanically connect structures of the first leadframe to structures of the structured metal plate. The semiconductor chip package includes a mold compound embedding the first leadframe, the structured metal plate and the semiconductor chip.