Leadless Semiconductor Package Using Conductive Epoxy and Wire Studs
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Solution Overview
Problem
Conventional semiconductor packages rely on expensive and complex lead frames for electrical connection, which increase the bill of materials and processing complexity.
Innovation Solution
A lead-less packaged semiconductor device is created using conductive epoxy to affix a semiconductor die to a metal foil on a carrier substrate, with wire studs or bumps formed around the die for electrical connection, eliminating the need for a lead frame and allowing for encapsulation and singulation without it.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional lead frames are used for electrical connection, then reliable electrical connections are achieved, but the bill of materials cost increases and processing complexity increases
Solution Approach 1:
The patent extracts and removes the lead frame from the packaging structure, replacing it with a simplified architecture where the semiconductor die is mounted directly on a substrate with wire bonds providing electrical connections. This eliminates the complex lead frame geometry while maintaining essential electrical connectivity functions.
Solution Approach 2:
The substrate serves multiple functions: it provides mechanical support for the semiconductor die, acts as a mounting platform for wire bonds, and enables electrical connections through conductive pathways. This multi-functional design replaces the specialized lead frame structure.
2Reliability
If conventional lead frames are used for electrical connection, then electrical connectivity is provided, but the bill of materials cost increases
Solution Approach 1:
The patent employs inexpensive substrate materials and standard wire bonds instead of costly lead frames. The design accepts that certain components may be single-use or have limited lifetimes, focusing on overall cost reduction rather than maximizing individual component durability.
Solution Approach 2:
The invention changes material parameters by substituting expensive lead frame materials with more economical substrate and wire bond materials. This parameter change in material selection and composition directly reduces the bill of materials while maintaining electrical connectivity functionality.
3Reliability
If complex lead frame geometries are used, then electrical connections are achieved, but manufacturing processing complexity increases
Solution Approach 1:
The patent segments the electrical connection function into separate, simpler components: the substrate provides the mounting platform, and wire bonds provide the electrical pathways. This segmentation eliminates the need for complex integrated lead frame geometries, making manufacturing more straightforward.
Solution Approach 2:
Instead of using a complex lead frame structure to achieve electrical connections, the patent inverts the approach by using simple wire bonds on a plain substrate. This reversal of the conventional architecture simplifies the manufacturing process while achieving the same electrical connectivity goal.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the bill of materials and simplifies the packaging process by eliminating the need for complex lead frames, while maintaining effective electrical connections through wire bonds and solder balls, resulting in a cost-effective and efficient semiconductor assembly.
Implementation Method 1
affixing a semiconductor die on the metal foil by a conductive epoxy
Implementation Method 2
wire bonds between the semiconductor die and a surface of the studs which is remote from the first major surface, the wire bonds providing electrical connections
Implementation Method 3
solder balls affixed to the studs at the first major surface
Data Source
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AI summary
Disclosed is a packaged semiconductor device having first and second major surfaces and comprising, a semiconductor die; conductive epoxy in contact with a surface of the semiconductor die, and exposed in a central region of the first major surface; a plurality of studs around a peripheral region of the first major surface; wire bonds between the semiconductor die and a surface of the studs which is remote from the first major surface, the wire bonds providing electrical connections between the semiconductor die and the plurality of studs; and encapsulant defining the second major surface and sidewalls of the packaged semiconductor device, wherein the first major surface is defined by the conductive epoxy, the encapsulant, and the studs.