Leadless Surface Mount Semiconductor Package Thermal Management
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Solution Overview
Problem
Current high power semiconductor packages face challenges with thermal conductivity, high lead content, and limited ability to package multiple semiconductor dies, leading to heat transfer issues and increased costs due to ceramic components.
Innovation Solution
A leadless surface mount semiconductor package design utilizing a thick heat sink flange with high temperature die attach materials like gold-silicon or silver, eliminating the need for a lead frame and allowing for multiple dies to be packaged in a single unit with improved thermal conductivity and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If ceramic-based packages are used for high power semiconductor devices, then thermal conductivity is improved, but manufacturing cost increases
Solution Approach 1:
The patent replaces expensive ceramic packages with a cheaper molded package structure that achieves adequate thermal management through integrated heat sink features and thermal vias in the PCB substrate, eliminating the need for costly ceramic materials while maintaining functional performance
Solution Approach 2:
The invention uses composite construction combining PCB substrate with copper heat sink structures and thermal interface materials to achieve effective heat dissipation, replacing single-material ceramic packages with a multi-material composite approach that reduces cost while maintaining thermal performance
2Reliability
If lead frame structures are used in semiconductor packages, then electrical connectivity is improved, but device complexity and cost increase
Solution Approach 1:
The patent removes the lead frame structure entirely from the package design, extracting only the essential functions of electrical connectivity and mechanical support, which are then fulfilled by simplified PCB mounting structures and direct die-to-PCB bonding, eliminating unnecessary complexity
Solution Approach 2:
Instead of using a lead frame to provide mechanical support and electrical connections, the invention inverts the approach by having the PCB substrate itself provide both mechanical mounting and electrical interconnect functions, eliminating the intermediate lead frame structure
3Reliability
If single die per package is used, then package reliability is improved, but productivity and space utilization decrease
Solution Approach 1:
The patent combines multiple semiconductor dies within a single molded package structure, merging several functional components into one integrated unit that maintains individual die integrity while achieving space efficiency and improved packaging productivity
Solution Approach 2:
The package structure is designed with universal mounting features and standardized electrical interconnects that can accommodate multiple different types of dies with varying pin configurations, enabling a single package design to serve multiple functions and applications
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances thermal conductivity, reduces costs by eliminating ceramic components, and enables packaging of multiple semiconductor dies in a single package, improving reliability and performance for high power applications.
Implementation Method 1
mounting a semiconductor die to a first flange with a Pb-free, die attach material having a melting point in excess of 240° C.
Implementation Method 2
A first flange may have a first surface and a second surface, the first surface providing a first one of the plurality of terminations
Data Source
AI summary
A packaged semiconductor device may include a termination surface having terminations configured as leadless interconnects to be surface mounted to a printed circuit board. A first flange has a first surface and a second surface. The first surface provides a first one of the terminations, and the second surface is opposite to the first surface. A second flange also has a first surface and a second surface, with the first surface providing a second one of the terminations, and the second surface is opposite to the first surface. A die is mounted to the second surface of the first flange with a material having a melting point in excess of 240° C. An electrical interconnect extends between the die and the second surface of the second flange opposite the termination surface, such that the electrical interconnect, first flange and second flange are substantially housed within a body.