Leak Zone Memory Isolation via Barrier Instructions

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Solution Overview

Problem

Current computing systems face challenges in protecting against memory information leaks and impermissible access, particularly in virtualized environments, where vulnerabilities in the Hypervisor or Virtual Machine Monitor (VMM) can lead to privilege escalation and remote code execution, and existing solutions are ineffective in isolating guest memory from the host, allowing arbitrary access and performance impacts.

Innovation Solution

The implementation of leak zones and leak barriers within the memory, using instructions like 'Ibstart' and 'Ibend' to define code execution boundaries, along with a randomization offset register to randomize memory addresses, ensuring that code executes only within designated data zones, thereby preventing unauthorized access and isolating guest data from the host.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory allocation is performed without proper deallocation, then memory availability is maintained, but system performance deteriorates due to wasted addresses

Engineering Contradiction:
Improvememory management reliabilityVSAvoidsystem performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements feedback mechanisms through memory status tracking and leak zone monitoring. The system continuously monitors memory allocation states and provides feedback to identify and isolate memory leaks, enabling automatic deallocation and performance optimization while maintaining reliability.

Inventive Principle:
Principle #23Feedback

2Ease of operation

If memory access permissions are not strictly enforced, then code execution flexibility is improved, but security deteriorates due to impermissible access

Engineering Contradiction:
Improvecode execution flexibilityVSAvoidimpermissible access
Core Design Contradiction:
Ease of operationVSObject-affected harmful factors

Solution Approach 1:

The patent divides memory into distinct leak zones with separate permission sets. Each leak zone is segmented from other memory regions, allowing precise control over which code can access which data. This segmentation enables strict permission enforcement while maintaining execution flexibility within authorized zones.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by assigning different access permissions to different memory regions. Each leak zone has customized permission characteristics tailored to its specific code-data relationships, allowing flexible execution within zones while blocking impermissible access across zone boundaries.

Inventive Principle:
Principle #3Local quality

3Adaptability or versatility

If guest memory is not isolated from host, then system compatibility is maintained, but security deteriorates due to arbitrary access and privilege escalation

Engineering Contradiction:
Improvesystem compatibilityVSAvoidarbitrary access
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces leak zones as intermediary structures between guest memory and host. These leak zones act as mediators that translate guest memory references into controlled host memory access. The intermediary layer maintains compatibility by preserving guest memory semantics while preventing arbitrary access through enforced isolation boundaries.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11573910B2Apparatus, system and method to define memory information leak zones in a computing system
Publication Date: 2023.02.07 INTEL CORP
  • US11573910B2 patent drawing
  • US11573910B2 patent drawing
  • US11573910B2 patent drawing

AI summary

An apparatus of a computing system, a computer-readable medium, a method and a system. The apparatus comprises processing circuitry including a core, and a communication controller coupled to the core to communicate with a memory of the computing system, wherein the memory is to define a leak zone corresponding to a plurality of memory addresses including data therein, the leak zone having an identifier; and the processing circuitry is to: decode instructions including a starting leak barrier, an ending leak barrier, and a sequence of code between the starting and ending leak barriers, the sequence of code including the identifier for the leak zone, the identifier to indicate the sequence of code is to be executed only on the data within the leak zone; and execute the sequence of code only on the data within the leak zone based on the leak barriers and on the identifier.