Leakage Compensation Dynamic Register for Stable Data Storage
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Solution Overview
Problem
Dynamic registers experience significant dynamic leakage current, leading to data loss and instability in data storage.
Innovation Solution
A leakage compensation dynamic register is designed with a PMOS and NMOS transistor series connected between the output terminal and node, utilizing a leakage compensation unit to feed back leakage current, improving data storage stability and accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a dynamic register uses parasitic capacitances of transistors to temporarily store data, then data storage function is achieved, but dynamic leakage current is generated causing data loss
Solution Approach 1:
The patent introduces a leakage compensation unit that implements feedback by detecting the leakage current at the storage node and compensating for it through a feedback path. The compensation unit monitors the voltage at node S0 and actively counteracts the leakage effect, thereby maintaining data integrity without requiring excessive refresh operations.
Solution Approach 2:
The dynamic register structure incorporates self-compensation mechanisms where the leakage compensation unit uses the existing circuit elements (transistors, capacitors) to automatically detect and correct its own leakage issues. The system serves itself by using internal resources to maintain its own operational integrity without external intervention.
2Productivity
If the node S0 is used to temporarily store data through parasitic capacitance, then data registration function is achieved, but data security and accuracy deteriorate due to leakage
Solution Approach 1:
The leakage compensation unit continuously monitors the voltage level at node S0 and provides feedback compensation to maintain accurate data representation. This feedback mechanism ensures that even as leakage occurs during high-speed operation, the data accuracy is preserved through active correction.
Solution Approach 2:
The compensation mechanism is proactively designed into the register structure before leakage causes data corruption. By anticipating the leakage effect and providing pre-configured compensation paths, the system maintains data accuracy throughout the storage period without waiting for degradation to occur.
Data Source
AI summary
A leakage compensation dynamic register, a data operation unit, a chip, a hash board, and a computing apparatus. The leakage compensation dynamic register comprises: an input terminal, an output terminal, a clock signal terminal, and an analog switch unit; a data latch unit for latching the data under control of the clock signal; and an output drive unit for inverting and outputting the data received from the data latch unit, the analog switch unit, the data latch unit, and the output drive unit being sequentially connected in series between the input terminal and the output terminal, and the analog switch unit and the data latch unit having a node therebetween, wherein the leakage compensation dynamic register further comprises a leakage compensation unit electrically connected between the node and the output terminal.